Basic logic gates, Computer Engineering

Assignment Help:

Basic logic gates

Introduce the basic logic gates in terms of

a) their function,

b) their circuit symbol,

c) their truth table and

d) their equivalent in Boolean algebra (a mathematical method based on human reasoning which will be explained later).

 

The NOT gate or inverter.

The NOT gate is the simplest of all logic circuits. It has just one input and one output. If the input is a logic level 1 then the output is a logic level 0. Similarly if the input is 0 then the output is 1 so that the output is the inverse of the input. The circuit symbol is

1351_NOT gate or inverter.png

The truth table for a NOT gate is

A

X

0

1

1

0

The Boolean algebra equivalent is 

X-> ‾A

 

The OR gate.

The output of an OR gate is at logic level 1 when any of the inputs are high otherwise it is at logic level 0. There may be any number of inputs. The circuit symbol for a three input OR gate is

1307_OR gate.png

 

The Boolean algebra equivalent is

X = A + B + C

 

The truth table of a three input OR gate is

A

B

C

X

0

0

0

0

0

0

1

1

0

1

0

1

0

1

1

1

1

0

0

1

1

0

1

1

1

1

0

1

1

1

1

1

 

The AND gate.

The output of an AND gate is only high when all of the inputs are high, otherwise the output is low. There may be any number of inputs just like the OR gate. The circuit symbol for a three input AND gate is

 

1422_AND gate.png

 

 

The truth table for a three input AND gate is

A

B

C

X

0

0

0

0

0

0

1

0

0

1

0

0

0

1

1

0

1

0

0

0

1

0

1

0

1

1

0

0

1

1

1

1

 

The Boolean algebra equivalent is

X = A.B.C

 


Related Discussions:- Basic logic gates

Explain the significance ipv6 over ipv4, Explain the significance IPV6 over...

Explain the significance IPV6 over IPV4. The maximum size of an Ipv6 datagram is 65575 bytes, with the 0 bytes Ipv6 header. Ipv6 also describe a minimum reassembly buffer size:

Define a gate fix asic-based design in short, Define a Gate Fix ASIC-based ...

Define a Gate Fix ASIC-based design in short. Gate Fix ASIC-based design: A Gate Fix implies that a select number of gates and their interconnections may be subtracted or ad

:P, My name is mrs flo and i apporve dubstep, do you apporve it?

My name is mrs flo and i apporve dubstep, do you apporve it?

What is indexing, What is indexing? Specific fields shown on each scann...

What is indexing? Specific fields shown on each scanned document are provided to our organization to make the systematic arrangement of your records. This process is designed t

Discuss in detail table management techniques, Discuss in detail Table mana...

Discuss in detail Table management Techniques? An Assembler uses the subsequent tables: OPTAB: Operation Code Table consists of mnemonic operation code and machine langua

Enumerate the process of dynamic modelling:, Define the Process of dynamic ...

Define the Process of dynamic modelling: Analyse applicability of actions Recognize object states Create dynamic model diagram Express every state in terms o

Coding advantages of casex or casez, Coding advantages of casex or casez ...

Coding advantages of casex or casez By using casex or casez has the following coding advantages: -  It reduces number of lines, especially if the number of bits had been m

Which one is better hardware or software firewall, Which one is better hard...

Which one is better hardware or software firewall While deciding whether to buy a hardware or software firewall, the user must consider important factors such as performance an

Explian two limitations of dead-box analysis, (a) Explian two limitations o...

(a) Explian two limitations of dead-box analysis. (b) Describe why memory analysis is difficult. (c) With reference to the "Shadow Walker" rootkit, explain what is meant by

C PROGAMM, CODING FOR...WHAT IS THE PROBABILITY THAT A CARD DRAWN FROM A PA...

CODING FOR...WHAT IS THE PROBABILITY THAT A CARD DRAWN FROM A PACK OF 52 CARDS WILL BE A DIAMOND OR A KING .

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd