Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Associative Array Processing
Consider that a list of record or a table is stored in the memory and you want to search some information in that list. For example, the list having of three fields as given below:
Name ID Number Age
Sumit 234 23
Ramesh 136 26
Ravi 97 35
Suppose now that we want to search the ID number and age of Ravi. If we use conventional RAM then it is essential to give the exact physical address of entry related to Ravi in the instruction access the entry such as:
READ ROW 3
One more alternative idea is that we seek the whole list using the Name field as an address in the instruction such as:
READ NAME = RAVI
Again with serial access memory this option can be executed easily but it is a very slow process. An associative memory helps at this point and simultaneously looks at all the entries in the list and returns the desired list very fastly.
SIMD array computers have been developed with associative memory. An associative memory is content addressable memory, by which it is says that multiple memory words are accessible in parallel. The parallel accessing feature also gives support parallel compare and parallel search. This capability can be used in following applications such as:
The inherent parallelism element of this memory has great benefits and impact in parallel computer architecture. The associative memory is costly measure to RAM. The array processor built with associative memory is known as Associative array processor. In this part, we describe some of categories of associative array processor. Types of associative processors are relying on the organisation of associative memory. Thus, first we discuss about the associative memory organisation.
State the relation among Regular Expression, Transition Diagram and Finite State Machines. By using a simple instance establish your claim. Answer: For each regular language,
Explain briefly Dead code Elimination of the commonly used code optimization techniques Dead code Elimination: Code which is unreachable or which does not influence the pr
What are Parallel Algorithms? The central assumption of the RAM model does not hold for some newer computers that can implement operations concurrently, i.e., in parallel algor
Explain the Paging Unit Paging mechanism functions with 4K - byte memory pages or with a new extension available to Pentium with 4M byte-memory pages. In Pentium, with new 4M-b
What is GDPro and MagicDraw UML GDPro : This is a full suite of code management tools and UML. MagicDraw UML: UML diagrams fully support this: MagicDraw RConverter a
Explain the Structure of Virtual Enterprise. The virtual enterprise can be a suitable structure to explore the emerging opportunities for forming value in the information socie
Define formal language grammar? A formal language grammar is a set of formation rules which describe that strings made by the alphabet of a formal language are syntactically va
What is a pipeline hazard? Any condition that causes the pipeline to stall is known as hazard. They are also known as stalls or bubbles.
When investing money, an important concept to know is compound interest. The equation FV = PV (1+rate)periods . This relates the following four quantities. The present value (PV)
Explain the Design Procedure for Flip Flop? The design procedure as follows. 1) Acquire the clear description of the desired flip flop X. 2) Acquire the present state- next
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd