Associative array processing, Computer Engineering

Assignment Help:

Associative Array Processing

Consider that a list of record or a table is stored in the memory and you want to search some information in that list. For example, the list having of three fields as given below:

Name   ID Number      Age

Sumit           234           23

Ramesh        136           26

Ravi             97             35

 

Suppose now that we want to search the ID number and age of Ravi. If we use conventional RAM then it is essential to give the exact physical address of entry related to Ravi in the instruction access the entry such as:

                           READ ROW 3

One more alternative idea is that we seek the whole list using the Name field as an address in the instruction such as:

                       READ NAME = RAVI

Again with serial access memory this option can be executed easily but it is a very slow process. An associative memory helps at this point and simultaneously looks at all the entries in the list and returns the desired list very fastly.

SIMD array computers have been developed with associative memory. An associative memory is content addressable memory, by which it is says that multiple memory words are accessible in parallel. The parallel accessing feature also gives support parallel compare and parallel search. This capability can be used in following applications such as:

  • Retrieval and storage of databases which are changing rapidly
  • Radar signal tracking
  • Image processing
  • Artificial Intelligence

The inherent parallelism element of this memory has great benefits and impact in parallel computer architecture. The associative memory is costly measure to RAM. The array processor built with associative memory is known as Associative array processor. In this part, we describe some of categories of associative array processor. Types of associative processors are relying on the organisation of associative memory. Thus, first we discuss about the associative memory organisation.


Related Discussions:- Associative array processing

How many voice channel have a master group, A Master group consists of? ...

A Master group consists of? A master group have 300 voice channels.

Combinational logic, At a particular moment in time the output of a COMBINA...

At a particular moment in time the output of a COMBINATIONAL logic circuit depends uponthe inputs to the circuit at the same instant.(Unlike sequential logic circuits where the out

What do you mean by interrupts, Q. What do you mean by Interrupts? The ...

Q. What do you mean by Interrupts? The term interrupt is an exceptional event which causes CPU to temporarily transfer its control from presently executing program to a separat

Difference between latches and flip-flops based designs, What is the differ...

What is the difference between latches and flip-flops based designs Latches are level sensitive whether flip-flops are edge sensitive. So, latch based design and flop based des

What is difference between cgi and java, CGI and JAVA are fundamentally dis...

CGI and JAVA are fundamentally dissimilar, and for most applications are NOT interchangable. CGI is a protocol for running programs on a WWW server. Whilst JAVA can also be us

Structure of input - output interface, Q. Structure of Input - Output Inter...

Q. Structure of Input - Output Interface? Due to complexity and number of external devices that I/O interface control, there is not any standard structure of I/O interface. Let

What is multiprogramming, Multiprogramming is a rapid switching of the CPU ...

Multiprogramming is a rapid switching of the CPU back and forth among processes.

Explain about hyper-threading, Q. Explain about Hyper-threading? Non th...

Q. Explain about Hyper-threading? Non threaded program instructions are executed in a single order at a time until the program completion. Presume a program have four tasks nam

How many ram chips are required for memory of 2048 bytes, How many 128 × 8 ...

How many 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes. Ans. Available here RAM chips = 128 x 8 Required the memory capacity    = 2048 x 8 No. of chip

Explain cache-only memory access model (coma), Cache-Only Memory Access Mod...

Cache-Only Memory Access Model (COMA) As we have considered earlier, shared memory multiprocessor systems can use cache memories with each processor for decreasing the execution

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd