Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Associative Array Processing
Consider that a list of record or a table is stored in the memory and you want to search some information in that list. For example, the list having of three fields as given below:
Name ID Number Age
Sumit 234 23
Ramesh 136 26
Ravi 97 35
Suppose now that we want to search the ID number and age of Ravi. If we use conventional RAM then it is essential to give the exact physical address of entry related to Ravi in the instruction access the entry such as:
READ ROW 3
One more alternative idea is that we seek the whole list using the Name field as an address in the instruction such as:
READ NAME = RAVI
Again with serial access memory this option can be executed easily but it is a very slow process. An associative memory helps at this point and simultaneously looks at all the entries in the list and returns the desired list very fastly.
SIMD array computers have been developed with associative memory. An associative memory is content addressable memory, by which it is says that multiple memory words are accessible in parallel. The parallel accessing feature also gives support parallel compare and parallel search. This capability can be used in following applications such as:
The inherent parallelism element of this memory has great benefits and impact in parallel computer architecture. The associative memory is costly measure to RAM. The array processor built with associative memory is known as Associative array processor. In this part, we describe some of categories of associative array processor. Types of associative processors are relying on the organisation of associative memory. Thus, first we discuss about the associative memory organisation.
n=(x*2)/(1=0) the value x=0 and is used to stop the algerithin.The calculation is repeated using values of x=0 is input. There is only a need to check for error positions. The va
a) Total available bandwidth = 1 Mbps = 1000 Kbps Each user requires send data at the rate of = 500 kbps As it is circuit switched network we have to dedicate the bandwidth So the
The 68HC11 series is based on the Motorola 6800/1 programming instruction set and hence is a fairly simple 8 bit microprocessor. The internal structure of the 6800/1 is shown below
Storage Technology: In the previous section, the, recent innovations relating to the processing aspects of computer technology were discussed briefly. In considering some of t
Name the various Display devices Different types of display devices are discussed along with the principles on which these work. The main display devices used with CAD systems
Write an implementation for the Prime machine (de?ned at the end of the assignment sheet). Provide a suitable invariant and variant for any loop you use. Provide comments in your m
Q. Write Policy of cache memory? If contents of a block in cache are changed then it's essential to write it back to main memory before replacing it. Write policy determines wh
Ask questiPower and EnergyQuestion 4Consider a processor that runs at 2.5 GHz and 1 Volt. When running a given CPU-bound program,the processor consumes 100 W, of which 20 W is leak
What does the term convergence mean with respect to E-commerce? Convergence with respect to e-commerce The ability to leverage and integrate the several data sources and
How semaphores implement mutual exclusion? Mutual-exclusion implementation along with semaphores: Assume that there are n-processes and they share a semaphore, mutex (stan
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd