Reference no: EM131093525

A certain well-known computer family represents the exponents of its floating-point numbers as "excess-64" integers; i.e., a typical exponent e6e5e4e3e2ele0 represents the number e = -64 +∑_i=0⁶ 2ⁱe_i. Two such exponents are input to a conventional 7-bit parallel adder. Which of the following should be accomplished in order to obtain a sum that is also in excess-64 notation?

A. The most significant adder output bit should be complemented.
B. An end-around carry should be generated.
C. The adder outputs should be bitwise complemented.
D. A low-order carry should be inserted.
E. The adder output should be left unchanged.