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a) if x(t) is even, show that its Fourier transform is real for all w (i.e: its imaginary part is identically 0)b)if x(t) is odd, show that its Fourier transform is imaginary for all w (i.e: its real part is identically 0)
mutual shifted by 90 degree currents through each of both windings of the single phase A motor are (5.5+1.7) A but RMS voltage of the supply is 220 V. How big will be torque on shaft of the motor is efficiency factor (\eta\) is 0.7
Calculate the smallest area of the RCS pf the target if the transmitters peak power is 1MW, frequency =10GHz, sensitivity ofthe receiver is -100dB/W, antenna gain is 50dB. Perform the calculation for the reference condition.
A negative unity feedback loop with input R(s), output Y(s) and error E(s) is placed around the system \(H(s)=1/((s+p_{1})(s+p_{2})...(s+p_{q}))\)(a) Find the transfer function E(s)/R(s).
The rotor of a 3phase, 5kw, 400v, 50Hz, slip ring indution motor is wound for 6 poles while its stator is wound for 4 poles. The approx average no load steady state speed when this motor is connected to 400v, 50Hz what is the supply
An indiviual wishes to deposit an amount of money now and $100 every six months so that at the end of five years $1500 will have been accumulated. With interest 4% per year, compounded semiannually, how much should be deposited?
Design a combinational circuit with four inputs, x,y,w, and z, and four outputs: A, B, C, and D. When the binary input value in decimal is 3,8,12 or 15, the binary output value is one less than the input value, otherwise it is one greater than the..
Discrete Systems and Digital Signal Processing Looking for a step by step solution to the following question, y(n) - .6y(n-1) + .6y(n-2) = 0, y(-1) = 0, y(-2) = -1 What is the output do to the given initial conditions
Design a MOS differential amplifier to operate from +/- 1V power supplies and dissipate no more than 2 mW in the equilibrium state. The differential voltage gain Ad is to be 5 V/V and the output common-mode dc voltage is to be 0.5 V.
Using a 4-bit synchronous counter and an AND gate, construct a counter that counts from 0000 through 1010. Repeat for a count from 0000 through 1110. Minimize the number of inputs to the AND gate.
FPGAs are programmed from a compiled HDL description (i.e., a Verilog or VHDL program). What would you have to have in the HDL description to use the global set/reset function in the Spartan FPGA
What is the bandwidth required (in bps) if synchronous time division multiplexing is used, along with the standard analog-to-digital sampling rate, and each sample is converted into an 8-bit value.
Use computer graphics/ or by hand to illustrate 6-pole stator winding of an AC machine. For wt = 0 and wt = 180o show the phasor diagram of phase currents, polarity of currents in individual conductors, and the flux paths.
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