Reference no: EM131662933

Assignment

Part A: Logic Design

Logic Design & Family Compatibility

Specifications

1. Five volt power supplies are used on both source and destination circuits.

2. The signal must not be inverted in passing through the interface. (It may of course be inverted within the interface, but must emerge the same as it went in.)

3. The interface is to contain an LED (with current between 5mA and 10mA) to indicate the state of the data (at point X), as well as any extra gates (of any type) needed to provide the interface function. (Use gates only, not transistors.)

4. The interface must be properly designed to ensure that it takes into account the worst case specifications of the logic gates involved. D.C. design only is required.

Steps
1. Assemble the relevant worst case data on all gates and organise in a table of the following form, using data

Gate	VOH	IOH	VOL	IOL	VIH	IIH	VIL	IIL
74HC00					-	-	-	-
74S02	-	-	-	-
4001	-	-	-	-
74LS00					-	-	-	-

2. Design the circuit by carefully considering each possible position of the switches, both voltage and current and both high and low states, and choosing a combination of gates to form the interface circuit.

Part B: Power Transistor amplifier design

Design

Design a push-pull amplifier using the circuit arrangement given and with the following specifications:

Supply voltages                                 ± X V

Output power                                     Y W

Voltage gain                                       > Z dB

Low frequency roll-off point          < Q Hz      (Lower bandwidth limit)

Rin                                                      > J ohms

Show all calculations for component values from DC and AC considerations. Choose a suitable input signal voltage to achieve the specification.
[See Design Assignment A, Part C for design tips]

Simulation
Use MICROCAP (or similar) to simulate your design, using any suitable transistors (e.g. Q1).

1. Plot transient analysis of output (on load resistor) and input (to C1). You should expect to see a voltage gain >5 without distortion to the output sine waveform (ie: no clipping).

2. Short out the diode and R4 and repeat the transient analysis. Crossover distortion should be more visible.

3. Determine the d.c. bias values at the base, collector and emitter of Q1 and at the commoned emitters of the output stage. If your circuit does not work as expected, this should point to the errors.

4. Run an A.C. Analysis to confirm the gain and bandwidth requirements (ie: correct capacitor choices).

Part C: Voltage controlled oscillator design

Design task

Design a VCO (voltage controlled oscillator) using an LM324 quad op. amp.or LM741 op. amp.s (refer to the data sheets):

Test (Optional)
Assemble your design and check that it works. An LM324 (single supply) op. amp. and any small transistor should work. You will also need to provide VDD / 2 with a voltage divider of two 1k ohm resistors or similar.

If you have access to equipment, measure the performance of your circuit in regard to each of the design specifications.

Part D: Semiconductor devices

Select two devices and submit a short report for each, covering the following details:

- what the device is (name, type)
- explanation of the devices' features and how it works
- sample circuit application making use of its feature(s) with a circuit operation explanation (include any relevant calculations).

Design assignment A

Part A: Comparators, Astables and Switching exercise

(1) Signal limit detector
Use a 339 comparator, a single 74LS02 quad NOR gate and a +5V power supply only to design a circuit which will detect when a voltage goes outside the range +2.5V to +3.5V and such that an LED lights and stays lit. Provide a manual reset to extinguish the LED.

Design hints
1. The circuit has an analog input and a digital output so some form of comparator circuit is required. There are two thresholds so two comparators are required, with the analog input applied to both. This arrangement is sometimes known as a window detector.
2. Arrange the output of the comparators to be +5V logic levels, and combine the two outputs logically to produce one signal which is for example, high for out-of-range, and low for within-range.
3. Latch the change from in-range to out-of-range.

Design procedure
1. Start at the output and work backwards.
2. Select a latch circuit (flip-flop) and determine what combinations of inputs are needed to latch and then reset it, ensuring that the LED is connected correctly with regard to both logic and current flow.
3. Determine the logic needed to combine two comparator outputs in such a way as to correctly operate the latch.
4. Choose comparator outputs which will correctly drive the logic. Remember that the reference voltage at the input of the comparator may be at either the + or - input.
5. Choose resistors to provide the correct reference voltages.

(2) MOSFET Switching

Find out information on the operation of, and configuring of, MOSFETs to be used in switching circuits. In particular note the differences between BJTs and MOSFETs in this role. Draw up a table to highlight the differences and hence the pros and cons on each device for particular situations (eg. Switching high-to-low or low-to-high (ie. P or N type), high or low current switching, low or high voltage switching).

(3) Astable
Use a single 4528 dual monostable to construct an astable circuit with a mark-space ratio of
0.33 and times of the order of 1 to 2 seconds. Put indicating LEDs on the circuit to indicate both times.

Design hints
1. The final transition of the times pulse from one monostable may be used to trigger the other monostable, producing waveforms as shown:

2. Mark-space means high time to low time.
3. You will need to look up the data for the I.C. you are using since details of timing relationships are different for each (see data sheets).

Part B: Differential amplifier exercise

Simulation
Use MICROCAP (or similar) to analyse the circuit. Leave out the voltage divider network (47k, 10k, 47k) for this.

1. Determine the d.c. voltages at both collectors and at the common emitter, by grounding the base of Q1 and running a d.c. analysis.
2. Determine the d.c. response at either collector to a varying input voltage over the range
-0.3v to +0.3v by adding a 1mV d.c. source as shown above and running a d.c. analysis. Use limits as shown on next page.
3. Add a 1μf capacitor to the input and so determine a.c. voltage gain, Ad (single collector to ground).
4. Connect the two bases together at the bias network and determine the a.c. common mode gain (single collector to ground). Change sine source to 1V.
5. Add the constant current source shown below in place of the common emitter resistor RE and again determine the single ended a.c. common mode gain. (i.e., repeat 4 above). Notice that it is very frequency dependent, but for frequencies less than about 1MHz, it is very much less than it was for the single resistor case. Hence common mode rejection ratio is very much improved.

Test

1. Construct the circuit shown on the previous page.
2. Vary the potentiometer over its entire range and at about nine evenly spaced intervals measure the voltage on the base and the voltage at both collectors.
You will need to take additional points at the cross-over to get a good representation of the shape of the curves.
The following values of base voltage are suggested: -0.3, -0.1, -0.06, -0.03, 0, +0.03,
+0.06, +0.1, +0.3 volts.
3. Calculate the corresponding collector circuits.
4. Plot on the one set of axes, graphs of each collector current and the sum of the two, versus input voltage.

Part C: Transistor Amplifier Design

Design and test a common emitter amplifier using the circuit shown and the selected specifications.

Simulation
Use the circuit simulation programme MICROCAP (or similar) to analyse your design: (Help is given on the following page.)

1. Determine the d.c. voltages at all points. This will check your design - if these are correct, the circuit should amplify an a.c. signal. Check choice of C1 for specification.
2. Determine the frequency response (voltage gain and phase versus frequency) over the range 1Hz to 1MHz.
3. Bypass RE with a capacitance of 0.47 µF and again determine the frequency response over the same frequency range.

Test (Optional)
Note that the measurements taken here are not expected to be accurate since it is assumed they will be done with a digital voltmeter only, and waveforms may not be sinusoidal. In building the circuit you may use a BC547 in place of the 2N22222.

1. Connect your circuit and measure the d.c. voltages around the circuit. If they are not as expected, find the cause and rectify it.
2. Connect the test oscillator (shown below) to the input. It should be producing an approximately sinusoidal signal of about 100kHz frequency and you can add an attenuator to produce a small size of say 0.2v p/p. Measure, using a DVM, the magnitude of the voltage gain at 100kHz.
3. Bypass RE with a capacitance of 0.47μF and again measure the voltage gain. You will need to reduce the size of the signal input in order to keep the output sinusoidal. Reduce it to an estimated 20mV.
4. Remove the bypass capacitor. Estimate the input resistance (at 100kHz) by adding a 1kW resistor (R) in series with the oscillator to monitor base a.c. current. Measure the a.c. voltage across this resistor, v. The input current is then iin = v/R, and the input resistance Rin of the amplifier is Rin = Vin/iin - R.

5. Repeat 3 and 4 with the 0.47μF capacitor bypassing RE.

Report
Show all design calculations.
Show full cct design with all component values.
Provide either -
o MCap plots for AC analysis, transient analysis and schematic showing node voltages and/or
o Test results from testing built circuit.
Comparison of results (measured or simulated) with specifications, drawing inferences and conclusions.

Design assignment B

Part A: Active filter design exercise

Design
Design a 3 pole high pass filter with a Butterworth response having a cut-off frequency of 160 kHz. The filter is to use the second order circuit arrangement given below, and first order section with LM108 or equivalent op. amps.

Build and test
Using an LM324, build your filter and test it by taking about 7 readings from 20 kHz to 2kHz using an oscilloscope (if you have access to one) or multimeter. If you feel your multimeter cannot take accurate AC voltage measurements at these frequencies, go to the course website for an alternative.

Design
Design a Wein Bridge Oscillator using a 741 operational amplifier as the active element. Amplitude stabilisation is to be achieved using the JFET as a voltage controlled resistance. Follow the procedure given in the study modules.

Attachment:- Logic Design.rar