Plot the output voltage of the line

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Reference no: EM131307711

One of the important advantages in using SPICE to solve transmission-line problems is that it will readily give the solution for problems that would be difficult to solve by hand. For example, consider the case of two CMOS inverter gates connected by a 5 cm length of 100-Ω transmission line as shown in Fig. P4.4.4. The output of the driver gate is represented by a ramp waveform voltage rising from 0 to 5 V in 1 ns and a 30 Ω internal source resistance. The receiving gate is represented at its input by 10 pF. Because of the capacitive load, this would be a difficult problem to do by hand. Use SPICE (PSPICE) to plot the output voltage of the line, VL(t), for 0

Reference no: EM131307711

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