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Assume that a 250 kVA distribution transformer is used for single-phase pole mounting. The transformer is connected phase-to-neutral 7200 V on the primary and 2520 V phase-toneutral on the secondary side. The leakage impedance of the transformer is 3.5%. Based on the given information, determine the following:
a. Assume that the transformer has 0.7 pu A in the HV winding. Find the actual current values in the HV and LV windings. What is the value of the current in the LV winding in per units?
b. Find the impedance of the transformer as referred to the HV and LV windings in ohms.
c. Assume that the LV terminals of the transformer are short-circuited and 0.22 per unit voltage is applied to the HV winding. Find the HV and LV winding currents that exist as a result of the short circuit in per units and amps.
d. Determine the internal voltage drop of the transformer, due to its leakage impedance, if a 1.2 per unit current flows in the HV winding. Give the result in per units and volts.
The first stage is a common-emitter amplifier and the second stage is a common-collector stage. You should use one npn (2N3904) and one pnp transistor (2N3906) to design the circuit to meet the design criteria. Use the transistor datasheets to fin..
a) Calculate the wind force on the turbine for a 5 mph wind. b) What is the force if the wind speed is tripled? c) Calculate the torque on the tower for the cases of the 5 and 15 mph wind velocities
design and test three matching networks
1.Design a finite state machine (FSM) that transitions from 0 to 2 to 4 to 5 to 7 to 0. Write the VHDL code for the FSM. 2.Design a finite state machine that detects two consecutive zeros (0s).
After driving a portion of the route, the tap tap is fully loaded with a total of 24 people including the driver, with an average mass of 70kg per person. In addition, there are three 15kg- goats, five 3kg- chickens, and a total of 25kg of bananas..
Write Verilog code that implements a 4-bit adder with carry-lookahead (i.e., not a ripple-carry adder). Your designshould have an output C4 for a carry generated in the mostsignificant bit stage and an overflow bit V for use with signed numbers.
The synchronous reactance of the generator is j1.35 per unit. Neglect armature resistance, armature resistance equals zero ohms. Both perunit impedances were calculated on the base MVA rating of thegenerator which is 75 MVA.
Consider the function f which has four inputs a,b,c,d and one output such that the output is a 1 if and only if the number of 1s in the inputs is even. (a) Write the canonical product-of-sums expression for f. Do not use the shorthand notation
Determine the maximum stress in the two dielectrics.- find positions of intersheaths, voltage on the intersheaths, maximum and minimum stress.
Why is it that a photoconductive detector gives a current gain while a photo emissive detector does not? What are the disadvantages of photoconductive detectors? Under what circumstances would you use one?
a. if the input r(t)=5u(t), ie. R(s)=5/s, find the steady-state of C(t), b. Approximately how many seconds are required for the system to reach steady state note you two time constants to consider, and c. Do you expect the transient response to be o..
If power Ps=10W, power gain factor G1=150, and power gain G2=14 dB, find the maximum value of LdB (path loss in dB) such that the power delivered to the resistor is -85 dBm.
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