Draw the schematics that implement the multiplexer function

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Reference no: EM13295153

1. The 4:1 multiplexer function has four data inputs A,B,C,D, two select control inputs S1,S0 and a single positive-logic output Z that operates as follows. When S1,S0 = 00 gates A to Z; S1,S0 = 01 gates B toZ; S1,S0 = 10 gates C to Z; and S1,S0 = 11 gates D to Z. Draw the schematics that implement the multiplexer function using only inverting tri-state buffers and conventional inverters.

2. Implement the function f(A,B,C,D,E) = A + C'D + BD' +B'D + B'CE using a 16:1 multiplexer and no other logic.The constants logic 1, logic 0, and the variables, but not their complements, areavailable

Reference no: EM13295153

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