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A certain full-wave rectifier has a peak output voltage of 30 V. A 50 F capacitor-input filter is connected to the rectifier. Calculate the peak-to-peak ripple and the dc output voltage developed across a load resistance
Determine the decimal value of each of the following SIGNED binary number displayed in the 2's complement form: a. 10011001 b. 01110100 c. 10111111
Classify these fields according to the Helmholtz theorem.
If 50.0 cm of copper wire (diameter 1.00 mm) is formed into a single circular loop and placed perpendicular to the uniform magnetic field that is increasing at a constant rate of 10.0 mT/s, at what rate is thermal energy generated in that loop.
A 3 Phase synchronous generator produces an open circuit line voltage of 5196V when the DC exciting current is 50 A. The AC terminals are then short circuited and the three line currents are found to be 500 A.
In the circuit of figure the switch 'S' is closed at t = 0 with iL (0) = 0 and VC(0) = 0. In the steady state Vc equals.
Justify the rationale of this second approach
Define Doppler effect as used in ultrasound applications. Quote the equations representing the two cases considered in Doppler effect.
Derive the state space equation of a DC motor with: 1)supply voltage and load torque as inputs and 2)armature current, angular speed as outputs.
Determine the signal/noise ratio (Eb/No) in input of the receiver for each modulation format presented below if symbol error rate (SER) is required to be 10-^4 (use the coherent detection), for the solution the appropriate graphs can be used inste..
What two amplifiers should be connected in cascade to form the compound circuit? Is there more than one possible design?
A 150kVA, 2080/208V, 60Hz, Y/Y connected, three-phase, step-down transformer consists of three identical single-phase transformers. Each transformer has the following parameter values: Rl = 0.45-ohm, Xl = 2.2-ohm , R2 = 4.5m-ohm
The output data register is written at port address 8. The input status register is read at port address 8, and provides the value of the comparator output in the least significant bit, with other bits hardwired to 0.
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