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A full wave rectifier has 50 Hz input signal, a peak voltage output VM of 12 V, and an output load resistance of R=10 kOhm. If ripple voltage is to be limited to Vr=0.2 V , determine the required capacitance value.
1. A transfer function of a low pass filter may be divided into which three response ranges Actual response, ideal response, and straight-line response Gain, ripple, and roll-off Pass band, roll-off, and stop band Attenuation, gain, and roll-off
A 4 pole, 3 phase induction motor is given a supply of frequency 50 Hz. Rotor speed is 1490 rpm. a) Find slip s b) The relative speed between stator field and rotor field c) Frequency of stator field and rotor field
A certain two-terminal circuit has an open-circuit voltage of 12V. When R=225 ohms is attached, the voltage across the load is 8V. Determine the Thevenin resistance for the circuit
A lossless transmission line, with characteristic impedance of 50Ω and eletrical length of l=0.27λ, is terminated by load impedance 40-j25Ω. Determine voltage reflection coefficient.
For the closed-loop system with plant model and controller given by G(s) = (s2+81)/(s2(s2 + 100)) D(s) = (K (S+1))/(S+13) (a) Find the locus of the closed-loop roots (poles) with respect to K;
Consider a 4 input, 1 output digital system (W,X,Y,Z, and f respectively) . Design a POS circuit with any number of inputs such that f(W,X,Y,Z) = M(0,2,4,9,13) + D(6,14).
A wave in free space has a wavelength of 12 cm. This wave reaches a material in which the transmitted wave has a wavelength of 8 cm. lEl= 10V/m and lHl= 100 mA/m. Find the frequency of the wave, along with the permitivity and permeability of the m..
Desing a logic Circuit that receives an array X(4 bits:X1,X2,X3, and X4) and makes it available as an output O(4 bits: O1,O2,O3, and O4) after one clock delay, subject to the control of input signals : "a" and "b". If a=b=0, then the data is NOT t..
digital radio link has a bandwidth of 8 kHz and support a transmission of 87 kbps. According to Nyquist how many bits per symbol are required to modulate the signal Remember to use an integer number of bits.
An MFSK modulation scheme with M = 4has a carrier frequency of 250 kHz, a difference frequency of 25 kHz, and two bits per signal element. Make a frequency assignment for each of the possible data combinations.
Write an assembly language program to count the number of numbers divisible by 32(in decimal) in the memory segment $1234~$4321, store these divisible numbers in memory starting at $ABCD, and place the addresses of these numbers in memory starting..
Use electric circuit analysis techniques and Laplace methods to find the charge, q(t), on the capacitor as a function of time. The switch is closed at t=0 and the initial voltage V0 on the capacitor is 8 Volts.
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