Design the width to length ratios of m1 and m3

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Reference no: EM131232118

Consider the circuit shown in Figure.

The input voltage v_I is either 0.1 V or 2.5 V.

Assume gate voltages of φ = 2.5 V. The threshold voltages are V_T _N = -0.6 V for M₄ and V_{T N} = 0.4 V for all other transistors. The width-to-length ratios are 1 for M₂ and M₄, and 5 for M_A and M_B.

(a) What are the logic 1 values for v_O1 and v_O2?

(b) Design the width-to-length ratios of M₁ and M₃ such that the logic 0 values of v_O1 and v_O2 are 0.1 V.

1885_Figure 2.jpg

Reference no: EM131232118

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