Reference no: EM132224505 , Length: 4 pages
Low-Power Radio-Frequency Integrated Circuit Design
Design and Simulation of a Buck-Boost Converter
Design and simulate a Buck-Boost converter to convert a 24 V DC voltage from a small solar panel to a variable DC supply at the output with less than 5% voltage ripple. You should have the duty cycle control to regulate the output voltage of the DC-DC Buck converter. Please follow the following steps and record the results in your final report.
1) Characterize the power semiconductor switch. You will use MOSFET for your power semiconductor device.
(a) Connect your device in a simple circuit and test the required gate voltages for turn-on and turn-off of the device.
(b) Vary the gate voltage and record the drain current, ID (for MOSFET). Show the plot in your report and make comment when the device is fully conducting.
(c) From step (b), use a gate voltage where the device is conducting. Vary the Drain-to-Source voltage, VDS (for MOSFET) and record the ID values. Make a plot using your data.
2) Select the switching frequency and other passive component values (i.e. inductor, capacitor and MOSFET sizes) for 12 V, 9 V and 30 V outputs with less than 5% voltage ripple.
3) Draw the Buck-Boost converter (without any controller) in a circuit simulator (e.g. LTSPICE, PSPICE, or any other SPICE circuit simulator) and simulate the converter circuit. Show the voltage outputs for different duty cycle ratios. Please use MOSFET to implement the diode in your circuit. Simply use two MOSFETs ad complimentary gate pulses.
4) Theoretically derive the converter ratio, M(D), and Power Efficiency (η) of the Buck-Boost converter and make MATLAB plots of the M(D) and η parameters.
Design of a High Frequency Ring Oscillators and Drive a Standard 50 ? Load
In this project, you have to design and simulate a ring oscillator and rig oscillator will drive a standard load, which could be an antenna, RF circuit or any other standard blocks.
A ring oscillator is a cascade of multiple (odd number) of inverting stages. In the simplest form, the inverting stage could be an inverter. By adjusting the device dimensions (i.e. MOSFET W/L ratio), supply voltage (i.e. Vdd), and number of stages the frequency of the ring oscillator can be tuned to the target frequency of operation.
The followings are the design specifications for the project
1. Show the design and simulation of a CMOS (PMOS and NMOS) inverter using Cadence. Show the transient outputs of the CMOS inverter.
2. Cascade odd number of identical CMOS inverters and make a feedback connection from the output of the last stage (i.e. last inverter) to the input of the first stage (i.e. first inverter).
3. Perform transient simulation and check the frequency of oscillation.
4. Adjust the device dimensions (i.e. MOSFET W/L ratio), supply voltage (i.e. Vdd), and number of stages to tune the oscillation frequency close to 100 MHz.
5. To drive a standard 50 ? load resistor, design a matching network and connect it at the output of the ring oscillator.
[Note: Make sure the matching network does not affect the DC bias of the ring oscillator. Matching network with series capacitor will be a preferable one to resolve the problem.]
6. Show the transient simulation results of the ring oscillator connected with the matching network and the 50 ? load resistor.
Write a formal report (using IEEE format or UAB Lab format) to show your Cadence software based design schematic and all of your simulation results.