Design and implement a finite state machine

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Reference no: EM13255124

1- Design and implement a finite state machine (FSM) that transitions from 0 to 1 to 3 to 5 to 7 to 0. Use D-Flip-flop for the design

2- Design and implement a sequence detector using a finite state machine that detects the sequence 1, 1, 0, 1, 0. Consider previous/oldest bits for the sequence detection. Design the fuction using D-Flip-Flop

Reference no: EM13255124

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