Design a sub-system that serially transfers data

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Reference no: EM13280236

Design a sub-system that serially transfers data between two 8-bit registers and maintains a copy of the transferred data in the original register
Think of this as a system that uses two 8-bit registers A and B to transfer computations from the central processing unit (CPU) to an input output (I/O) device. Register A contains the outcome of the computations within the CPU and transfers these computations serially to the I/O port register B.
Register A must maintain a copy of the transferred data in case errors occur in transmission, of course once the transfer is complete and no errors reported register A can be over written.
1) The register consists of 8 Flip-Flops each having the ability to hold 1-bit of the 8-bits.
2) Inputs to the register include (i) inputs to the flip-flops, (ii) a clock signal, (ii) a signal to control the transfer and any other signal you might need to accomplish the task Note that register A needs feedback to maintain a copy of the transferred data. Also you will need to
design some logic circuit to accomplish the transfer i.e. circuitry that provides a transfer control signal.
Provide the following information as part of your report.
i) A state table for the type of Flip-Flop used to construct your Registers i.e., D-Flip Flop, S-R Flip-Flop, T-Flip Flop, J-K Flip Flop etc. The state table must include any additional input signals used e.g. clear, enable or preset signals.

ii) The characteristic equation of the Flip-Flop as determined from the state table.
iii) A serial transfer table showing the contents of each register after each clock cycle until all the 8-bits are transferred.
iii) A timing diagram showing the signals of interest which may include the clock, the status of each flip-flop after each clock cycle, the shift signal, the clear signal etc.

iv) Provide an equation that defines the highest clock frequency that could be applied to your design. Recall the significance of the signal propagation delay, flip-flop hold and set-up times etc.
Please simulate your design using PSPICE, LTSPICE, SimuAid or any Digital logic simulator of your choice and produce a report that follows the lab report guidelines.

Reference no: EM13280236

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