Create behavioral dataflow description to create comparator

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Using verilog hardware descriptional language or vhdl create a non-expandable dataflow description of a 2-bit magnitude comparator, from that create a behavioral dataflow description to create an expandable 2-bit magnitude comparator, using 4 of these 2-bit expandable magnitude comparators create a 8-bit magnitude comparator.

Reference no: EM13274080

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