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1. The dielectric constant of SiO2, Si3N4 and Ta2O5 are about 3.9, 7.6, and 25 respectively. What is the capacitance ratio for the capacitors with Ta2O5 and oxide/nitride/oxide dielectrics for the same thickness, provided the oxide/nitride/oxide has thickness ratio 1:1:1 for the oxide to the nitride?
2. In problem 1, if a material called Barium Strontium Titanate with dielectric constant of 500 is chosen to replace Ta2O5, calculate the area reduction ratio to maintain the same capacitance if the two films have the same thickness.
3. In problem 1, calculate the equivalent thickness of the Ta2O5 in terms of SiO2 thickness if both have the same capacitance. Assume the actual thickness of Ta2O5 is 3t.
A liquid level system converts a 4-10 m level into a 4-20mA current. Design a three mode controller (PID im assuming) that outputs 0-5 volts with 50% PB, 0.03 min integration time, and 0.05 min derivative time.
Write an assembly code for a subroutine implementing signed multiplication with Booth's algorithm. Make sure it works as expected. Compare it with your implementation of sign/magnitude multiplication from the second homework.
Write an asm HCS12 program to flash LEDs on a dragon+ board three times when SW5 is pressed with a 5 kHz frequency, and 50% duty cycle clock signal. Generate a clock signal with 5 kHz frequency, and 50% duty cycle.
Given a two's complement, fixed point number with 8-bits of integer and 8-bits of fraction: A. What is the largest (most positive) number you can represent B. What is the most negative number you can represent
A single phase 220V system draws a current of 15A at a lagging power factor of 0.8. Calculate the value of a capacitor that can be used to improve the power factor of this system to 0.95 lagging.
Design the combinational logic circuit for an elevator controller such that the option to go up or down by only one floor is disabled. Assume that the building the elevator is in has 4 floors. Your inputs are the current floor and the next request..
a machine processor address a maximum 2^24 bytes of memory. What is the maximum number of 32 bit words that can be store in memory.
Three point charges are positioned in the x-y plane as follows: 5 nC at y = 5 cm, -10 nC at y = -5 cm, and 15 nC at x = -5 cm. Find the required x-y coordinates of a 20-nC fourth charge that will produce a zero electric field at the origin.
Design a simple current divider that will reduce the current provided to a 1k Ohm load to 20% of that available from the source.
a. Write a Verilog code for a 2 to 1 Mux using gate-level structural level description. The two data input is D0 and D1, control input is C and output is Q. b. Write a Verilog code for a 2 to 1 Mux using behavioral level description.
MOS (p and n) npn and pnp transistors with parameters given in the text or select your own by using industrial data sheets, available on the internet. Also resistors, capacitors, and power supplies (10 V, 5 V, and 3.3 V) are available.
3-phase-Y-connected load of 40,000W at 0.8 PF lag is supplied by a three-phase Y-connected source of 500V. Find the current and phase voltages. Assuming Van as ref. Determine Ian, Ibn, Icn, Vab, Vbc, and Vca in phasor form.
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