**Non-inverting Comparator:**

Figure (a) illustrates the circuit diagram of an op-amp utilized as a non-inverting comparator. The output voltage of the circuit is given by

v_{0} = V_{SAT} sgn (V_{I} - V_{REF} )

The graph of v_{0} versus v_{I} is given in Figure

**(a) **** (b)**

**Figure: (a) Non-inverting Comparator; and (b) Plot of v**_{0} Versus v_{I}.

Positive feedback is frequently utilized with comparator circuits. The feedback is applied through the output to the non-inverting input of the op-amp. It is in contrast to the circuits covered in the preceding sections where feedback is applied to the inverting input. (The non-inverting integrator is an exception that uses feedback to both op-amp inputs.) Figure (a) gives the circuit diagram of an inverting op-amp comparator with positive feedback. The circuit is also called as a Schmidt trigger. The capacitor C_{F} in the figure is supposed to be an open circuit in the following. This capacitor is frequently used to develop the switching speed of a comparator by enhancing the amount of positive feedback at high frequencies. It has no effect on the input voltage at which the op-amp switches states.

** **

**(a) **** (b)**

**Figure: (a) Inverting Comparator with Positive Feedback; and (b) Plot of v0 Versus vI.**

The output voltage from the circuit of Figure (a) may be written

v_{0} = V_{SAT} sgn (V_{+} - V_{I} )

Because v_{0} has two stable states, v_{0} = +VSAT and v_{0} = - VSAT, it follows that v_{I }may have two stable states given by

V_{A} = V _{REF }( R_{F} / (R_{F} +R_{1}) ) - V_{SAT} (R_{1} /R_{F } + R_{1})

V_{B} = V _{REF }( R_{F} / (R_{F} +R_{1}) ) - V_{SAT} (R_{1} /R_{F } + R_{1})

where superposition and voltage division have been used for each equation. For

v_{I } < V_{A}, it follows that v_{0} = +V_{SAT}. For v_{I} > V_{B}, it follows that v_{0} = - V_{SAT}. For V_{A} < v_{I} < V_{B}, v_{0} may have two stable states, i.e. v_{0 }= ± V_{SAT}. The graph of v_{0} versus v_{I} is given in Figure (b).

The value of v_{0} for V_{A} < v_{I} < V_{B} based on whether v_{I } enhance from a value less than V_{A} or v_{I }reduce from a value greater than V_{B}. that is, the circuit has memory. If v_{I } < V_{A}, primarily and v_{I} starts to increase, v_{0} remains at the + V_{SAT} state until v_{I} becomes greater than V_{B}. At this point, v_{0} switches to the - V_{SAT } state. If v_{I} > V_{B} primarily and v_{I} starts to decrease, v_{0} remains at the - V_{SAT} state until v_{I} becomes less than V_{A}. Then v_{0 }switches to the + V_{SAT} state. The path for v_{0} on the graph in Figure (b) is mentioned with arrows. The loop in the graph is commonly called a hysteresis loop.