The data bus contains 8, 16, or 32 parallel signal lines. As denoted by the double-ended arrows on the data bus line in Figure, the data bus lines are bidirectional. It means that the CPU can read data in from memory or from a port on these lines, or it may send data out to memory or to a port on these lines. Several devices in a system shall have their outputs connected to the data bus, but only one device at a time shall have its outputs enabled. Any device linked on the data bus must have three-state outputs so that its outputs may be disabled when it is not being utilized to put data on the bus.