System diagram of complex programmable logic device, Electrical Engineering

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The system diagram for the proposed unit is shown below.

448_System diagram of Complex programmable logic device.png


The system operates on the principle of Time to Rate Conversion. Signals from the heart beat sensor are amplified and level shifted by the Signal Conditioning unit to produce a digital waveform characterised by a fixed pulse width (10 ms) and a period (T1) that varies in inverse proportion to the heart rate. That is to say as the heart rate increases the period decreases and vice versa.

The Digital Pre-processing unit samples T1 on this waveform to produce a 12 bit count that again is inversely proportional to the heart rate.

The Analogue Signal Processing unit converts this 12 bit count to a waveform with a variable pulse width (T2) which is now directly proportional to the heart rate.This is typically accomplished by feeding the count to a digital to analogue converter, using the converter output to charge an op amp configured as an integrator and using this output to reset a monostable. Thus the larger the count the quicker the integrator will reach the reset voltage and the shorter will be the monostable pulse.

The Digital Post-processing unit samples T2 on this waveform and converts to a 3 digit number that directly represents the heart rate in beats per minute suitable for output on seven segment displays.


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