Segment registers-microprocessor, Assembly Language

Segment Registers

The 8086 addresses a segmented memory unlike 8085. The complete 1 megabyte memory, which 8086 is capable to address is divided into 16 logical segments.Thuseach segment has 64 Kbytes of memory. There are 4 segment registers, viz, Data Segment Register (DS), Code Segment Register (CS), and Segment Register (SS). AndExtra Segment Register (ES) Stack The code segment register is utilized for addressing a memory location in the code segment of the memory, where the executable program is stored. As similar, the data segment register points to the data segment of the memory, where the data is resided. The additional segment also refers to a segment which really is another data segment of the memory. Thus the additional segment also contains data. The stack segment register is utilized for addressing stack segment of memory. The stack segment is that type segment of memory which is utilized to store stack data. The CPU utilizes the stack for provisionally storing important data, for example the contents of the CPU register which will be needed at a later stage. The stack grows down, for example. the data is pushed onto the stack in the memory locations with decreasing addresses.  When this information will be needed by the CPU, they will be popped off from the stack. When addressing of any location in the memory bank, the physical address is computed from 2 parts, the first is segment address and the second offset.  The segment registers contain 16-bit segment base addresses, related to different type of segments. Any of the pointers,BX andindex registers can contain the offset of the location to be addressed. The benefit of this scheme is that in place of maintaining a 20-bit register for a physical address, the processor only maintains two 16-bit registers which are within the word length capacity of the machine. Thus the DS, CS, SS and ES segment registers respectively contain the segment addresses for thedata, code, stack and extra segments of memory. It can be noted that all these segments are the logical segments. They can or cannot be physically separated. In other terms, a single segment may require more than one memory chip or more than 1 segment may be accommodated in a single memory chip.

 

Posted Date: 10/10/2012 4:18:41 AM | Location : United States







Related Discussions:- Segment registers-microprocessor, Assignment Help, Ask Question on Segment registers-microprocessor, Get Answer, Expert's Help, Segment registers-microprocessor Discussions

Write discussion on Segment registers-microprocessor
Your posts are moderated
Related Questions
Queue Operation :   RQ/CT0, RQ/G1-Request/Grant:   These pins are utilized by other local bus masters, in themaximum mode, to force the processor to release the loca

Prime Finder - assembly program: Problem:  Prime Finder   In this problem you will write a small program that tests whether a given integer is a prime number or not.  Let's

Tabular comparison for µ PS' Parameters Tables (a) and (b) list the characteristic of Intel microprocessor. Table(a):   Table(b): It has a 64 bit da

Write a program on the assembly language to do the following: 1- Allocate array with 32bit 100 element 2- Prompt the user to enter the maximum or the upper bound of the rando

Segment Registers The 8086 addresses a segmented memory unlike 8085. The complete 1 megabyte memory, which 8086 is capable to address is divided into 16 logical segments.Thusea

Flag Manipulation and Processor Control Instructions These instructions control the functioning of available hardware inside the processor chip. These are categorized into thes

RISC Characteristics : The  concept  of  RISC  architecture  include  an  attempt  to  reduce  execution  time  by make  simple  the instruction set of the computer. The main c

External Hardware-Interrupts External hardware-interrupts are generated by controllers of external devices or coprocessors and are connected to the processor pin for Non Mask a

DIV: Unsigned Division:- This instruction performs unsigned division operation. It divides an unsigned word or double word by a 16-bit or 8-bit operand. The dividend might be in t

64-bit integer calculator, which processes using 16-bits at a time (reg/mem16 operands)