Problem

(a) Prepare the assembly code sequence for each of the four styles (accumulator, memory-memory, stack, load/store) of machine for the
code fragment:

A = B + C;

(b) Determine the number of instruction bytes fetched and data bytes transferred to/from memory for each assembly code sequence. Which architecture is most efficient as calculated by memory traffic? Which architecture is most efficient as measured by code size?

Posted Date: 10/19/2013 7:38:04 AM | Location : United States

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