Microelectronic technologies and applications, Electrical Engineering

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The assignment comprises two parts, a CPLD Design Exercise and a CPLD Design Project.

The CPLD Design Exercise will enable you to acquire competance in programmable logic design by providing essential information on the device technology, the design process and the design software. It will take you through a complete design flow for an Altera programmable device using a series of walkthroughs and a given design example that build expertise in operating the Quartus II design software. You will be able to download the design to the CPLD on the supplied demo board and verify its correct operation.

The CPLD Design Project will enable you to apply your knowledge and expertise in programmable logic design by utilising the Quartus II software to construct a new design to a given specification. It will not be necessary to download this design to the demo board but it should be appropriately documented in a design report.


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