Interrupt signal interconnection network (isin), Computer Engineering

Interrupt Signal Interconnection Network (ISIN)

When a processor needs to send an interruption to another processor, then this interrupt initial goes to ISIN, through which it is conceded to the destination processor. By this way, synchronisation between processor is executed by ISIN. However, in case of breakdown of single processor, ISIN can broadcast the message to other processors about its breakdown.

While, every reference to the memory in tightly coupled systems is through interconnection network, there is a delay in implementing the instructions. To decrease this delay, each processor may use cache memory for the frequent references prepared by the processor as shown in Figure .

                                                 1178_Interrupt Signal Interconnection Network (ISIN).png

The shared memory multiprocessor systems can further more  be separated into three modes which are based on the behavior in which shared memory is accessed. These modes are shown in Figure 13 and are discussed below.

                                           1246_Interrupt Signal Interconnection Network (ISIN) 1.png

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