Intel architecture – 64, Computer Engineering

Assignment Help:

IA-64 (Intel Architecture-64) is a 64-bit processor architecture created in cooperation by Hewlett-Packard and Intel applied by processors like Itanium. The objective of Itanium was to create a 'post-RISC era' architecture employing EPIC (Explicitly Parallel Instruction Computing).

1 EPIC Architecture

In this system a complex decoder system inspects every instruction as it flows by pipeline and sees that which is able to be fed off to function in parallel across available execution units for example a series of instructions for executing computations.

 A = B + C and

 D = F + G

These would be independent of one another and won't affect one another and so they can be fed in 2 numerous execution units and run in parallel. The capability to extract instruction level parallelism (ILP) from instruction stream is necessary for high-quality performance in a modern CPU.

Forecasting which code can and which cannot be divide up this way is a exceptionally complicated task. In many cases inputs to one line are dependent on output from another however only if some other condition is true. For illustration Think about slight modification of illustration noted before A = B + C IF A==5 THEN D = F + G. In this case calculations stay independent of other however second command needs results from first calculation in order to know if it must be run at all.

In these cases circuitry on CPU generally 'guesses' what condition will be. In something such as 90% of all cases an IF would be taken suggesting that in our illustration second half of command can be safely fed in another core. But getting guess wrong can cause a important performance hit when result has to be thrown out in addition CPU waits for results of 'right' command to be computed. Much of improving performance of modern CPUs is because of better prediction logic however recently improvements have begun to slow. Branch prediction accurateness has reached figures in excess of 98% in recent Intel architectures and raising this figure can only be attained by devoting more CPU die space to branch predictor a self-defeating tactic since it will make CPU more costly to manufacture.

IA-64 instead depends on compiler for this task. Even before program is fed in CPU compiler inspects code and makes same sorts of decisions which would otherwise happen at 'run time' on chip itself. Once it has determined what paths to take it collects up instructions it knows can be run in parallel and bundles them in one larger instruction and then stores it in that form in program.

Related Discussions:- Intel architecture – 64

Identifying stakeholders, I have chosen an imaginary example to illustrate...

I have chosen an imaginary example to illustrate the different stakeholder categories. At Home sells a selection of consumer products, currently listed in a paper catalogue, whi

What are two methods of modifying sap standard tables, What are two methods...

What are two methods of modifying SAP standard tables? Append Structures and Customizing Includes.

Search mechanisms in prolog, Search mechanisms in Prolog: Here we can ...

Search mechanisms in Prolog: Here we can needs this simple Prolog program to describe how Prolog searches as:president(X) :- first_name(X, georgedubya), second_name(X, bush).

Main features of TCP, The main features of TCP are: Reliability: TCP...

The main features of TCP are: Reliability: TCP makes sure that any data sent by a sender arrives at destination as it was sent. There can't be any data loss or change in the

Differentiate between absolute and relative poverty, Question 1: Using ...

Question 1: Using appropriate diagrams, describe the optimal provision of a private good and a public good. Question 2: Using appropriate diagram, show how there is an

Id3 algorithm, ID3 algorithm: Further for the calculation for informat...

ID3 algorithm: Further for the calculation for information gain is the most difficult part of this algorithm. Hence ID3 performs a search whereby the search states are decisio

Computer networking, what are the steps to implement bus topology?

what are the steps to implement bus topology?

What are difference between mealy and moore state machine, What are differe...

What are difference between Mealy and Moore state machine? Difference between Mealy and Moore state machine: 1) Mealy and Moore models are the fundamental models of state ma

How a direct inward dialling is utilized, Direct inward dialling is used as...

Direct inward dialling is used as a feature in? Direct inward dialling is utilized as a feature in EPABX.

Write Your Message!

Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd