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For circuit demonstrated in figure, draw waveform of output voltage VO. Suppose ideal diode D and lossless capacitor C.
Name of the circuit given in figure is Positive Clamper. A circuit which shifts the signal in positive side in such a way that negative peak of signal falls on the zero level, is known as a Positive Clamper.
Working:
During negative half-cycle of input voltage, diode conducts heavily and acts like a closed switch see figure. Capacitor C is charged to 5 V (Vm) at the negative peak of signal with the polarity as marked. Slightly beyond negative peak, diode stops conduction through it and behaves as an open switch (see figure II)). Charged capacitor (Vm= 5V) just behaves as a battery whose voltage adds to the signal voltage, see figure C(ii).During positive half-cycle of the signal, diode is reverse biased and acts as an open switch. Resultant output voltage coming across load resistor RL will be as demonstrated in Fig (b): By writing KVL to the circuit shown in fig a (iii)., we get 5V + 5V - VO = 0 i.e.,
Output Voltage (VO) = 10 V. (at positive peak)
Name the part of modulation scheme preferred for digital communication
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