History of parallel computers, Computer Engineering

History Of Parallel Computers

The test with and implementations of the utilize of parallelism started year back in the 1950s by the IBM.  The IBM enlarges computers also called as IBM 7030 was building in 1959.  In the design of these computers, a number of new ideas like overlapping I/O with processing and instruction look ahead were established.  A serious advance towards designing similar computers was going ahead with the development of ILLIAC IV in 1964 at the University of Illinois.  It had an only control unit but have multiple processing elements. On this machine, at a time, a one operation is executed on dissimilar data items by diverse processing elements. The idea of pipelining was begin in computer CDC 7600 in 1969.  It takes pipelined arithmetic unit.  In the years 1970 to 1985, the study in this area was decided on the development of vector super computer.  In 1976, the CRAY1 was determined by Seymour Cray.  Cray1 was a pioneering effort in the enlargement of vector registers. It accessed main memory only for store and load operations. Cray1 never use optimized pipelined arithmetic unit and virtual memory.  Cray1 had timer speed of 12.5 n.sec. The Cray1 processor evolved upto a speed of 12.5 Mflops on 100 × 100 linear equation solutions. The next invention of Cray called Cray XMP was introduced in the years 1982-84.  It was attached with 8-vector supercomputers and it is used a shared memory also.

Apart from Cray, the giant company developing, Control Data Corporation (CDC), parallel computers of USA, formed supercomputers, the CDC 7600. Its vector supercomputers named Cyber 205 had memory to memory architecture that is, input Vector operands were flow from the main memory to the vector arithmetic unit and the outputs were accumulated back in the main memory.  The benefit of this architecture was that It did not maximize the size of vector operands. The drawback was that it essential required a very high speed memory so that there would be no speed mismatch between main memory and vector arithmetic units.  Developing such high speed memory is very expensive. The Clock hustle of Cyber 205 was 20 n.sec. In the 1980s Japan also going ahead for manufacturing high performance vector supercomputers. Companies like, Fujitsu, Hitachi and NEC were the core manufacturers.  Hitach Established S-810/210 and S-810/10 vector supercomputers in 1982. All these equipment used semiconductor technologies to accomplish speeds at par with Cyber and Cray.  But their vectorisers and operating system were inferior than those of American companies.

Posted Date: 3/1/2013 3:13:59 AM | Location : United States







Related Discussions:- History of parallel computers, Assignment Help, Ask Question on History of parallel computers, Get Answer, Expert's Help, History of parallel computers Discussions

Write discussion on History of parallel computers
Your posts are moderated
Related Questions

Write the applications of Michelson interferometer

Define a socket? An application program interface gives the details of how can an application program interacts along with protocol software. But socket API is a defacto standa

Is the basic list deleted when the new list is created? No.  It is not removed and you can return back to it using one of the standard navigation functions like clicking on th

Remember, the value of α is between 0 and 1. Now, let us put some values of α and compute the speed up factor for increasing values of number of processors.  We get that the S(N) k

Write a function "plot2fnhand" that will receive 2 function handles as input arguments, and will show in two Figure Windows plots of these functions, with the function names in the

Q. What is Collective Message Passing? In collective message passing all the processes of a group take part in communication. MPI offers a number of functions to apply the coll

Indirect addressing A memory location is given that holds another memory location. This second memory location holds the real data. This mechanism solves problems caused by rea


Define the Half Duplex Transmission A half-duplex channel can receive andsend, but not at the same time. It's like a one-lane bridge where two-way traffic should give way in