Hazards of pipeline - computer architecture, Computer Engineering

Hazards of pipeline - computer architecture:

Hazards: When a programmer (or compiler) writes assembly program code, they make the supposition that each instruction is executed before execution of the subsequent instruction is started. This supposition is invalidated by pipelining. When it causes a program to behave not correctly, this situation is known as a hazard. many techniques for resolving hazards such as stalling exist and forwarding.

Non-pipeline architecture is not efficient because some CPU components (modules) are idle as another module is active at the time instruction cycle. Pipelining does not fully cancel out idle time in a CPU but building those modules work in parallel improves program execution considerably.

Processors having pipelining are organized inside into stages which can semi-independently work on distant jobs. Each stage is organized and connected into a 'chain' so each stage's output is fed to another stage till the job is done. This organization of the processor permits overall processing time to be considerably reduced.

A deeper pipeline means that there are more stages in the pipeline, and so, fewer logic gates in each pipeline. It usually means that the processor's frequency may be increased as the cycle time is lowered. It happens due to the reason of fewer components in each stage of the pipeline; as a result the propagation delay is decreased for the whole stage.

Unluckily, not all of the instructions are independent. In a pipeline, finishing an instruction may need 5 stages. To operate at complete performance, this pipeline will required to run 4 subsequent independent instructions as the first is completing. If four instructions that do not depend on the output of the initial instruction are not available, the pipeline control logic has to insert a stall or wasted clock cycle into the pipeline till the dependency is resolved. Luckily, techniques like forwarding can considerably reduce the cases where stalling is needed. Whereas pipelining may in theory increase performance on a un pipelined core by a factor of the number of stages (presumptuous the clock frequency also scales with the number of stages), in fact, most of the code does not permit for ideal execution.

Posted Date: 10/13/2012 3:59:30 AM | Location : United States







Related Discussions:- Hazards of pipeline - computer architecture, Assignment Help, Ask Question on Hazards of pipeline - computer architecture, Get Answer, Expert's Help, Hazards of pipeline - computer architecture Discussions

Write discussion on Hazards of pipeline - computer architecture
Your posts are moderated
Related Questions
Determine reduced Boolean equation and the Karnaugh Map? Illustration : Determine reduced Boolean equation and the Karnaugh Map for the truth table shown below:

Backward Chaining: In generally given that we are only interested in constructing the path whether we can set our initial state to be the theorem statement and search backward

Q. How to Apply Color and Style? 1.  In first text description layout cell, select heading text from the word "Fly" through the word "Mountains." 2.  In Property inspector,

WML & WML Script 1. How to call a WML Script from a WML Page? 2. Write a brief note on WML Script Operators and Expressions. 3. Write brief notes on WML Script Statements

List the factors that determine the storage device performance. i.Access time ii.Cycle time iii.Transfer Rate.

Non-Uniform Memory Access Model (NUMA) In shared memory multiprocessor systems, local memories are able to be connected with every processor. The collection of all local

Segment Combinations In 8086 assembler provides a means for combining segments declared in various modules. Some typical combine types are: 1.   PUBLIC: This combine directi

how can i explain dynamic hashing

Describe about the Embedded applications assembly Embedded applications assembly and C programs are developed since embedded programs aren't large. For all others high-level an

how to build PVR set-top box using raspberry