Explain about RISC architecture, Computer Engineering

Q. Explain about RISC ARCHITECTURE?

Let's first list some significant considerations of RISC architecture:

1. RISC functions are kept simple unless there is a very good reason to do otherwise. A new operation which increases execution time of an instruction by 10 per cent can be added only if it decreases size of the code by at least 10 per cent. Even greater reductions might be necessary if the extra modification requires a change in design.

2. Micro-instructions stored in CU cannot be faster than simple instructions because the cache is built from same technology as writable control unit store, a simple instruction can be executed at same speed as that of a micro-instruction.

3. Microcode is not magic. Moving software into microcode doesn't make it better; it only makes it harder to change. Runtime library of RISC has all characteristics of functions in microcode, except that it's easier to change.

4. Simple decoding and pipelined execution are more significant than program size. Pipelined execution gives a peak performance of one instruction each step. The longest step determines the performance rate of pipelined machine so ideally every pipeline step must take same amount of time. 

5. Compiler must simplify instructions instead of generate complex instructions. RISC compilers try to eliminate as much work as possible at the time of compile time so that simple instructions can be used. For illustration RISC compilers attempt to keep operands in registers so that simple register-to-register instructions can be used. RISC compilers keep operands which will be reused in registers instead of repeating a memory access or a calculation. They consequently use LOADs and STOREs to access memory so that operands aren't implicitly discarded after being fetched.

Posted Date: 7/30/2013 5:33:18 AM | Location : United States







Related Discussions:- Explain about RISC architecture, Assignment Help, Ask Question on Explain about RISC architecture, Get Answer, Expert's Help, Explain about RISC architecture Discussions

Write discussion on Explain about RISC architecture
Your posts are moderated
Related Questions
Object oriented programming languages directly show the real life objects. The features of OOPL as inheritance, polymorphism, and encapsulation makes it strong.

Rational ClearQuest is a change-request management tool that tracks and handles defects and change requests all through the development process. With ClearQuest, you can manage eac

The  most common types are the AWARD,AMI, AND phoenix

A program is to be developed to simulate the operations of a scientific calculator. List the facilities to be provided by this calculator. Analyze this using a DFD 0- level and 1-

Over fitting Considerations - artificial intelligence Left  unexamined ,  back  propagation  in  multi-layer  networks  may  be very susceptible  to over fitting itself to the

What is dynamic memory allocation? The mechanism of allocating needs amount of memory at run time is known as dynamic allocation of memory. Sometimes it is needed to allocate m


External storage systems A number of different types of external memory devices are available now. Some of these are considered below (hard drives haven't been mentioned as th

Explain Erasable Programmable ROM (EPROM) - Computer Memory? An EPROM is a ROM that can be reprogrammed and erased. A little glass window is installed at the top of the ROM pac

Q. What is Dithering? CMYK provides only 8 colours (C, M, Y K, Violet= C + M, Orange= M + Y, Green = C + Y, and colour of paper itself!). What about other colours?  For these t