Explain about RISC architecture, Computer Engineering

Q. Explain about RISC ARCHITECTURE?

Let's first list some significant considerations of RISC architecture:

1. RISC functions are kept simple unless there is a very good reason to do otherwise. A new operation which increases execution time of an instruction by 10 per cent can be added only if it decreases size of the code by at least 10 per cent. Even greater reductions might be necessary if the extra modification requires a change in design.

2. Micro-instructions stored in CU cannot be faster than simple instructions because the cache is built from same technology as writable control unit store, a simple instruction can be executed at same speed as that of a micro-instruction.

3. Microcode is not magic. Moving software into microcode doesn't make it better; it only makes it harder to change. Runtime library of RISC has all characteristics of functions in microcode, except that it's easier to change.

4. Simple decoding and pipelined execution are more significant than program size. Pipelined execution gives a peak performance of one instruction each step. The longest step determines the performance rate of pipelined machine so ideally every pipeline step must take same amount of time. 

5. Compiler must simplify instructions instead of generate complex instructions. RISC compilers try to eliminate as much work as possible at the time of compile time so that simple instructions can be used. For illustration RISC compilers attempt to keep operands in registers so that simple register-to-register instructions can be used. RISC compilers keep operands which will be reused in registers instead of repeating a memory access or a calculation. They consequently use LOADs and STOREs to access memory so that operands aren't implicitly discarded after being fetched.

Posted Date: 7/30/2013 5:33:18 AM | Location : United States







Related Discussions:- Explain about RISC architecture, Assignment Help, Ask Question on Explain about RISC architecture, Get Answer, Expert's Help, Explain about RISC architecture Discussions

Write discussion on Explain about RISC architecture
Your posts are moderated
Related Questions
Which one is an error reporting protocol? An error reporting protocol is ICMP.

Explain the System Design of Object oriented modelling System Design : At this stage, the whole system model is designed. This is the phase where the complete system is divi

draw the flowchart for operator overloading in c++


Mobile Computing 1. What is Wireless Protocol Requirements and also explain in brief medium access control protocol. 2. Illustrate FDMA and TDMA concepts. 3. What are the

Q. Programming with loops and comparisons? This segment deals with more practical illustrations employing comparison, loops and shift instructions. Simple Program Loops

Q. Explain Simple Interfacing? The following is a sample of the coding, used for procedure interfacing: PUBLIC CUROFF             _TEXT SEGMENT WORD PUBLIC 'CODE'

10 k Ohm pulls up on MCLR so that the ICD can force 0, +5, +13 volts on this pin. RB6 and RB7 used for PGC and PGD respectively between target and ICD2 module. Some of the requi

The general method for constructing the parameters of the RSA cryptosystem can be described as follows: Select two primes p and q Let N = pq and determine ∅ (N) = (p - 1

The xlswrite function can write the contents of a cell array to a spreadsheet.  A manufacturer kepts information on the weights of some parts in a cell array.  Every row stores the