Draw and elucidate the block diagram of programmable interrupt controller 8259. The 8259A adds 8 vectored priority encoded interrupts to microprocessor. It can be expanded to 64 interrupt requests by employing one master 8259A and 8 slave units. CS and WR should be decoded. Other connections are direct to microprocessor.  Pins D7 - D0: bidirectional data connection, IR7 - IR0: Interrupt request, used to request an interrupt and connect to a slave in a system with multiple 8259A. WR :-Connects to a write strobe signal (upper or lower in a 16 bit system) ,  RD :- Connects to IORC signal ,  INT :- Connects to INTR pin on the microprocessor from master and is connected to a IR pin on a slave  and  INTA :- Connects to INTA pin on the microprocessor.  In a system only master INTA signal is connected A0:- Selects different command words with in 8259A, CS: - Chip select - enables 8259A for control andprogramming, SP/EN: - Slave Program (1 for master, 0 for slave)/Enable Buffer (controls data bus transceivers in a large microprocessor based system when in buffered mode) and CAS2-CAS0:- Used as outputs from master to the slaves in cascaded systems.    Posted Date: 8/20/2013 2:35:02 AM | Location : United States

Ask an Expert

Your posts are moderated

Write your message here..

Related Questions

When the divide overflow is generated, Divide overflow is generated when ... Divide overflow is generated when  (A) Sign of the dividend is dissimilar from that of divisor.  (B) Sign of the dividend is same as that of divisor.  (C) The first part

What is computer to computer communication, Computer to computer communicat... Computer to computer communication is: (A)  Simplex                                   (B)  Duplex (C)  Half Duplex                             (D)  Both Duplex and Half D

State in brief about polymorphism, State in brief about Polymorphism C... State in brief about Polymorphism Class hierarchy is the deciding feature in the case of more than one implementation of properties. An object oriented program to compute the

Concept of multithreading, Concept of Multithreading: These troubles incre... Concept of Multithreading: These troubles increase in the design of large-scale multiprocessors such as MPP as discussed above. Thus, a solution for optimizing this latency should

Describe the necessary conditions for deadlock, Describe the necessary cond... Describe the necessary conditions for Deadlock. Required conditions for deadlock 1. Mutual exclusion 2. Hold and wait 3. No preemption 4. Circular wait Mutual e

Resolution method, Resolution Method: For a minor miracle occurred in ... Resolution Method: For a minor miracle occurred in 1965 where Alan Robinson published his resolution method as uses a method to generalised version of the resolution rule of i

Combinational logic circuits, A circuit can be designed to perform manydiff... A circuit can be designed to perform manydifferent functions e.g.a circuit has 3 inputs A, B and C and 3 outputs:Output X is logic level 1 (or 'high') if one or moreinputs are at l

What are the properties of electronic cash, What are the properties of elec... What are the properties of electronic cash? Properties: 1. Monetary Value: Monetary value should be backed by bank certified cashier’s cheque or cash, bank authorized cred

Design issues of interconnection network, Design Issues Of Interconnection ... Design Issues Of Interconnection Network The following are the problems, which should be considered while preparing an interconnection network. 1)   Dimension and size of n

draw the precedence diagram , The desired daily output for an assembly ... The desired daily output for an assembly line is 360 units. This assembly line will operate 450 minutes per day. The following table have information on this product's task times a