Draw and elucidate the block diagram 8259, Computer Engineering

Draw and elucidate the block diagram of programmable interrupt controller 8259.

The 8259A adds 8 vectored priority encoded interrupts to microprocessor. It can be expanded to 64 interrupt requests by employing one master 8259A and 8 slave units. CS and WR should be decoded. Other connections are direct to microprocessor. 

Pins D7 - D0: bidirectional data connection, IR7 - IR0: Interrupt request, used to request an interrupt and connect to a slave in a system with multiple 8259A.

WR :-Connects to a write strobe signal (upper or lower in a 16 bit system) ,  RD :- Connects to IORC signal ,  INT :- Connects to INTR pin on the microprocessor from master and is connected to a IR pin on a slave  and  INTA :- Connects to INTA pin on the microprocessor.  In a system only master INTA signal is connected A0:- Selects different command words with in 8259A, CS: - Chip select - enables 8259A for control andprogramming, SP/EN: - Slave Program (1 for master, 0 for slave)/Enable Buffer (controls data bus transceivers in a large microprocessor based system when in buffered mode) and CAS2-CAS0:- Used as outputs from master to the slaves in cascaded systems. 

 

2345_micro.png

Posted Date: 8/20/2013 2:35:02 AM | Location : United States







Related Discussions:- Draw and elucidate the block diagram 8259, Assignment Help, Ask Question on Draw and elucidate the block diagram 8259, Get Answer, Expert's Help, Draw and elucidate the block diagram 8259 Discussions

Write discussion on Draw and elucidate the block diagram 8259
Your posts are moderated
Related Questions
What is a Region? A Region is a continuous area of a process's address space (like text, data and stack). The kernel in a "Region Table" that is local to the process mainta

How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes? Ans. All higher order l

Classification of interrupts:   1. a) asynchronous   external components or hardware malfunction 1.b)synchronous   function of program state (for example over

Advantages of Encapsulation You can also delay the resolution of the details until after the design.  You can keep your code modular.

Q. Explain working of D Flip -Flop? D (data) flip-flop is modification of RS flip-flop. Problem of undefined output in SR flip-flop when both R and S become 1 gets avoided in D

Explain path testing.   Path Testing: Testing in which all paths in the program source code are tested at least once. Path testing has been one of the first test methods, and e


Define device interface. The buffer registers DATAIN and DATAOUT and the status flags SIN and SOUT are part of circuitry commonly called as a device interface.

Why is fragmentation needed on Internet not on a typical WAN? TCP/IP protocol utilizes the name IP datagram to demote to an Internet packet. The amount of data carried into a d

The information in ROM is stored ? Ans. By the manufacturer throughout fabrication of the device.