Direct mapped strategy, Computer Engineering

Determine the layout of the specified cache for a CPU that can address 1G x 32  of memory.  show the layout of the bits per cache location and the total number of locations. 

a) The cache have 64K x 32 of data and has the fully associative strategy

b) The cache have 64K x 32 of data and has the direct mapped strategy

 c) The cache have 64K x 32 of data and has the two-way set-associative strategy

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