De multiplexing Address Data Bus (AD₇- AD₀)

As it is already discussed that  lower  order address bus (A₇- A₀)  is multiplexed  with data bus (D₇- D₀). Hence  pins for  these two  things  are denoted by (AD₇- AD₀). Microprocessor provides address during  earlier part of  the operation on  these  pins. Then  provides  data on the same pin during  later part of the  operations  ( see  timing  diagram also in chapter7).

ALE  ( Address  Latch Enable )  signal is used to de multiplex  these  address data bus.

ALE   goes high  during  earlier part of the operation  which  enable the  latch (see fig) when  the latch ( 74LS373) is  enabled  the address  supplied by  the microprocessor is  available  on the order  side for  the latch  on the low order address bus.  The high  order address is always available on  A₁₅ - A₈ line which  are dedicated for high order address only. In  this way  complete  address is available line  the address  bus (A₁₅ - A₀) which  will memory address is  located on the primary memory  of the microprocessor. Once  the  memory  address is located ALE goes low  which  disables the  latch  hence blocks the bits  available  on multiplexed lines(AD₇ -AD₀) which  may flow  from microprocessor  to memory  ( or I/ O) or vice  versa.

Posted Date: 4/4/2013 3:49:17 AM | Location : United States

Ask an Expert

Related Discussions:- De multiplexing address data bus, Assignment Help, Ask Question on De multiplexing address data bus, Get Answer, Expert's Help, De multiplexing address data bus Discussions

Write discussion on De multiplexing address data bus
Your posts are moderated

Write your message here..

Related Questions

Counter-controlled analog to digital converter, Q. Counter-controlled analo... Q. Counter-controlled analog to digital converter? Figure shows the block diagram of a counter-controlledA/Dconverter. Resetting the binary counter to zero produces D/A output

Pop instruction, POP Instruction This instruction  copies the contents ... POP Instruction This instruction  copies the contents  of the top  two locations  of the  stack into the  specified  register pair. The  contents  of stack pointer register are

Dc machines, compound generator drawback compound generator drawback

Show equivalent circuit of a synchronous machine, Equivalent Circuit of a S... Equivalent Circuit of a Synchronous Machine A review of the material about elementary synchronous machines is very helpful at this stage to recall the principles of operation f

Explain the neg instruction, Explain the NEG instruction. NEG: Two's c... Explain the NEG instruction. NEG: Two's complement or arithmetic sign inversion (NEG). The NEG instruction two's complements a number that means that the arithmetic sign of a

Electromechanical energy conversion and device, importance of electromechan... importance of electromechanical energy conversion and device in electrical engineering

Operating system, what is serveces of operating system? what is serveces of operating system?

Discuss some features of pentium series of microprocessors, Discuss some fe... Discuss some features of Pentium series of microprocessors. The Pentium is a CISC microprocessor, 32-bit superscalar.  The term superscalar is utilized for the processor that

Show limitations of microprocessor-based control systems, Q. Show limitatio... Q. Show limitations of microprocessor-based control systems? Practical limitations of microprocessor-based control systems stem from the following considerations: • Finite-w

Determine the air-gap flux density, Q. A four-pole dc generator is lap woun... Q. A four-pole dc generator is lap wound with 326 armature conductors. It runs at 650 r/min on full load, with an induced voltage of 252 V. If the bore of themachine is 42 cmin dia