Dataflow modeling for dsp design, computer science, Basic Computer Science

Dataflow Modeling for DSP Design

The necessary components in the research of application-specific computer architectures are: 1) a clearly identified set of problems that can be settled using the particular application-specific strategy, 2) a official process for requirements of these programs, and 3) a methodical strategy for developing software and components from such a requirements. In this publication we concentrate on included indication, picture, and video clip indication producing programs, and a requirements style known as Synchronous Dataflow that has established to be very useful for style of such programs.

Dataflow is a well-known selection style in which an application is showed as a set of projects with information precedence's. Determine 1.1 reveals an example of dataflow information, where calculations projects (actors),,, and are showed as groups, and arrows (or arcs) between stars signify FIFO (first-in first-out) lines that immediate information principles from the result of one calculations to the feedback of another. Determine 1.2 reveals the semantics of dataflow information. Actors eat information (or wedding party, showed as principal points in Determine 1.2) from their information, execute information on them (fire), and generate a certain variety of wedding party on their results. The features conducted by the stars determine the overall operate of the dataflow graph; for example in Determine 1.1, and could be information resources, could be an easy inclusion function, and could be an information mess up. Then the operate of the dataflow information would be basically to result the sum of two feedback wedding party.


Dataflow index charts are a very useful requirements process for indication producing techniques since they take the user-friendly expressivity of prevent blueprints, circulation index charts, and indication circulation index charts, while offering the official semantics required for program style and research resources. The programs we concentrate on are those that can be described by Synchronous Dataflow (SDF) [LM87] and its extensions; we will talk about the official semantics of this computational style in details in Part 3. SDF in its genuine type can only signify programs that have no decision-making at the process stage. Plug-ins of SDF (such as the Boolean dataflow (BDF) style [Lee91] [Buc93]) allow management constructs, so that data-dependent management circulation can be indicated in such designs. These designs are much more highly effective with regards to expressivity, but they give up some of the useful logical qualities had the SDF style. For example, Money reveals that it is possible to replicate any Turing device in the BDF style [Buc93].

The BDFmodel can therefore figure out all Turing computable features, whereas this is not possible in the situation of the SDF style. We talk about the Boolean dataflow modeling change for the restricted expressivity of an SDF manifestation, we can properly examine circumstances such as whether a given SDF information deadlocks, and whether it can be integrated using a specific quantity of storage. No such common techniques can be created for verifying the corresponding circumstances (deadlock conduct and surrounded storage usage) for a calculations style that can replicate any given Turing device. This is because the issues of identifying if any given Turing device prevents (the stopping problem), and identifying whether it will use less than a given quantity of storage (or tape) are undividable [LP81];that is, no common formula prevails to fix these issues in specific time. In this perform, we first concentrate on methods that use to SDF programs, and we will suggest plug-ins to these methods for programs that can be specified basically as SDF, but enhanced with a small variety of handles constructs (and hence tumble into the BDF model).


SDF has established to be a useful style for comprising considerable category possibilities algorithms; several computer-aided style resources for DSP have been designed around SDF and carefully relevant designs. Illustrations of beginning professional resources that used SDF are the Indication Producing Perform program (SPW) from Pedal rotation [PLN92] [BL91], and COSSAP, from Synopsys [RPM92]. More recently-developed professional resources that use SDF and relevant designs of calculations are ADS from Agilent (formerly, from the Eason category of Hewlett Packard); Concentric System Facilities (formerly known as El Greco) from Synopsys [BV00]; Lab VIEW from Nationwide Equipment [AK98]; and System Fabric from Angeles Design Techniques [MCR01]. Tools designed at various analysis labs that use SDF and relevant designs involve DESCARTES [RPM92], DIF[HKB05], GRAPE [LEAP94], the Information Compiler [VPS90], NP-click[SPRK04], Serenity [SOIH97], PGMT [Ste97], Ptolemy [PHLB95], River It[TKA02], and the Twist compiler [Pri92]. Determine 1.3 reveals an example of an F-system specified as a prevent plans in Pedal rotation SPW.

The SDF style is well-known because it has certain logical qualities that are useful in practice; we will talk about these qualities and how they happen in the following area. The most essential home of SDF charts in the perspective of this publication is that it is possible to successfully manipulate parallelism in an formula specified as an SDF details by organizing information in the SDF details onto several processor chips at gather or style time rather than at run-time. Given such routine that is established at gather time, we can draw out details from it with a perspective towards applying one more rendering. In this publication we provide methods for reducing synchronization and interprocessor interaction over head in statically (i.e., gather time) planned multiprocessors in which the application is resulting from a dataflow details requirements. The technique is to style run-time performance of such a multiprocessor to identify how processor chips convey and connect, and then to use this details to boost one more rendering.

Posted Date: 3/9/2012 8:12:08 AM | Location : United States

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