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Classification of interrupts:
1. a) asynchronous
1.b)synchronous
2a. coerced
2b. user request
3a. Non-Maskable
User cannot disable processing
3b. User Maskable
User can disable processing
4a. within an instruction
Usually synchronous - Harder to deal with
4b. between Instructions
Usually asynchronous
5a. Termination
5b. Resume
Zero address instruction format is used for (A) RISC architecture. (B) CISC architecture. (C) Von-Neuman architecture. (D) Stack-organized architecture.
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