Modify the state diagram branching conditions

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Reference no: EM135168

Problem 1. Modify the state diagram branching conditions in the diagrams below as needed to ensure the sum and exclusion rules are obeyed in each case. You can add a holding conditions or change branch codes as desired.

620_Modify the state diagram branching conditions.png

Problem 2. A vending machine should SELL an item if 30 cents is input. The machine has a coin sensor that can detect nickels, dimes, and quarters, and reject everything else. No change is given (i.e, if two quarters are input, simply assert SELL and keep the fifty cents). Sketch a state diagram to assert SELL when adequate coinage has been inserted.

 

Problem 3. Create a state diagram for a machine that can control a 4-button digital combination lock mechanism, unlocking only if the sequence B0-B3-B1 is detected.

Problem 4.  Sketch a circuit for the state machines below.

409_Modify the state diagram branching conditions1.png

Problem 5. Sketch a state diagram based on the following Verilog Code  

module fsm (

    CLK, RST, X, Y, Z, RED, BLUE);

 input CLK, RST, X, Y, Z;

output reg RED, BLUE;

 localparam S1 = 2'd0;

localparam S2 = 2'd1;

localparam S3 = 2'd2;

localparam S4 = 2'd3;

 reg [1:0] ps, ns;

 always @ (ps, x, y, z)

begin

case (ps)

    S1: begin

        RED = 1'b0;

        BLUE = 1'b0;

        if (X == 1'b0) ns = S1;

        else ns = S2;

    end

    S2: begin

        RED = 1'b0;

        BLUE = 1'b1;

        if (X == 1'b0 && Y == 1'b0 && Z == 1'b0) ns = S2;

        else if (X == 1'b1 || Y == 1'b1) ns = S1;

        else if (Z == 1'b1 && X == 1'b0 && Y == 1'b0) ns = S3;

    end

    S3: begin

        RED = Y;

        BLUE = 1'b0;

        if (Y == 1'b1 && X == 1'b0 && Z == 1'b0) ns = S4;

        else if (X == 1'b0 && Y == 1'b0 && Z == 1'b0) ns = S3;

        else if (X == 1'b1 || Z == 1'b1) ns = S1;

    end

    S4: begin

        RED = 1'b1;

        BLUE = X;

        ns = S1;

    end

    default: begin

        RED = 1'b0;

        BLUE = 1'b0;

        ns = S1;

    end

endcase

end

always @ (CLK, RST)

begin

if (RST == 1'b1) ps <= S1;

else ps <= ns;

end

 endmodule

Problem 6.  Assign state codes to the state diagrams below, using unit-distance coding and/or matching state codes to outputs

1938_Modify the state diagram branching conditions3.png

Reference no: EM135168

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