##### Reference no: EM132235187

**Problem 1: **Draw the non-abbreviated logic diagram

Construct the truth table for each.

a) ((ab)′(b′c)′+ a′b′c′)′

b) ((abc)′ + (a′b′c′)′

c) (a ⊕ b) ⊕ c + ab′c

d) (((a + b)′ + c)′ + ??)′

**Problem 2:**

Draw a Karnaugh map

Find the minimum AND-OR expression for x(a,b,c,d).

a) Σ(2,4,5,11,13,15)

b) Σ(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14)

**Problem 3:**

Draw a Karnaugh map

Find the minimum AND-OR expression for x(a,b,c,d) with don't care conditions.

a) Σ(0,3,14) + d(2,4,7,8,10,11,13,15)

b) Σ(1,6,9,12) + d(0,2,3,4,5,7,14,15)

Remember Don't Cares do not have to be circled, but should be used to obtain the largest groupings

**Problem 4:**

Draw the truth table.

Hint -a, b, & s are the three inputs on your truth table and x & y are the two outputs. Draw 2 K-Maps - one for output of x and one of for output of y

Find & show the minimum AND-OR expressions - one for f(x) and one for f(y) Construct one circuit using only AND, OR, and inverter gates.

**Problem 5:**

Study Fig 10.57 & 10.58 and apply what you have learned about gates to determine the solution.

Notes:

- The A with the bracket in Fig 10.58 indicates A0 thru A7 from the A bus. Your solution will look similar to Fig 10.58 and will have both the A bus and the B bus as inputs.

- The line on top means NOT so this reads NOT A AND B

- There is a presentation that explains 10.57 & 10.58 named Combinational Circuit Blocks posted in Worked Examples.

**Attachment:-** Computer Organization and Architecture.rar