What is the maximum number of character

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Reference no: EM13890554

Assignment 1:

1. The Arithmetic Logic Unit performs operations on
a) RAM
b) Flash Memory
c) Registers
d) EEPROM
e) None of the above

2. A 16-bit system needs to address between 32 and 64 kB of memory, therefore it requires
a) Paging
b) RAM superposition
c) RAM and Flash swaps
d) All of the above
e) None of the above

3. A device's interrupts can be turned off by
a) mxxSetIntPriority(0)
b) mxxSetIntPriority(7)
c) mxxIntEnable(0)
d) mxxIntEnable(1)
e) mxxIntClearFalg()

4. What address mode is best to use when you want to compare what is in the A register with a constant?
a) Direct
b) Immediate
c) Indirect
d) Index
e) Extended

5. Which is not a valid way to address an operand?
a) Relative method
b) Pragma direct method
c) Memory indirect method
d) Indexed method
e) Register method

6. Which kind of variables should I use to pass data in and out of an interrupt service routine?
a) A global variable
b) A function's input parameter
c) An extern variable
d) A static variable
e) An unsigned variable (e.g. uint32_t or uint8_t)

7. A pointer is ...

a) An area in memory used for address storage
b) A memory address held in a variable
c) A subroutine address held in a stack pointer
d) All of the above
e) None of the above

8. The initialization function for single-vectored ISRs?
a) mxxSetIntPriority(1)
b) mxxIntEnable(1)
c) mxxIntClearFalg()
d) INTEnableSystemSingleVectoredInt();
e) INTEnableSystemMultiVectoredInt();

9. What is a nested interrupt?
a) It is what happens when a robin does when it gets up in the morning
b) It is a secondary, blocked interrupt
c) It is not possible to incorporate on the PIC32
d) It is an interrupt which engages after another has already engaged
e) It is an embedded interrupt which engages through a loop routine

10. Typically interrupt latency time is
a) 3 TPB
b) 3 TCY
c) 3 PR2
d) 3 Tcrystal
e) 3 TPWM

11. The MIPS processor is considered a
a) Embedded kernel architecture
b) Load-store architecture
c) RTS/CTS unified architecture
d) CISC architecture
e) Bilateral superscalar pipelined processor architecture

12. An instruction is...
a) An operation plus zero, one or more operands
b) An operation plus a program counter
c) A code in RAM that performs specific tasks
d) A method for installing ROM data in a container class
e) None of the above

13. The value in the a0 register after ori a0, zero, (1 << 7) operation is a) 255
b) 7
c) 0x10
d) 0x80

e) 0x01

14. The value of the stack pointer after addiu sp, sp, -4 operation is
a) Sp-4
b) Sp+4
c) Sp=4
d) No change
e) None of the above

15. What does the lw a0, 0(s0) operation do? a) a0=a0+0
b) a0=a0+s0
c) a0=a0+M[s0+0]
d) s0=a0+0 e) a0=s0*0

16. Your assembler program has jumped to a function. What is the purpose of the following operations
addiu sp, sp, -4 sw s0, 0(sp)
a) Save the register s0 in the stack
b) Retrieve the register from the stack
c) Retrieve the return address from the stack
d) Save an address into the stack
e) Pass a value through s0 to a called function

17. Examine the following assembler code. What does it do? mylbl:
j mylbl nop
a) it joins the RAM found in mylbl
b) it performs a "no operation"
c) it loops
d) it jumps forward to another segment of RAM
e) none of the above

18. What is the true statement regarding the following assembler code for the PIC32? lw s0, 0(sp)
addiu sp, sp, 4
a) it clears register s0
b) it immediately removes the stack pointer
c) it decrements from the stack
d) it saves registers
e) it is found in the epilogue of a function

19. What does the following assembler routine do? la s1, PORTE
a) take the value found at 32 bits from the current stack and store it in s1.
b) load the value in s1 and place it at PORT E
c) load the value in PORT E and place it into s1
d) load the address of PORT E register into s1
e) none of the above

20. How many bits per second (baud) is a serial port sending when the character rate is 120 characters per second? Assume ASCII, one stop bit and even parity.
a) 840
b) 960
c) 1200
d) 2400
e) 4800

21. An UART is transmitting data at 9600 baud rate. The format is 8 data bits, no parity, and one stop bit. What is the maximum number of character that can be transmitted?
a) 9600
b) 960
c) 19200
d) 1200
e) None of the above

22. A UART module is transmitting at 19.2 kilobaud. The format is seven data bits, even parity, one stop bit. How long does it take to send a document that is one megabyte long? (note: one megabyte=1048576 characters)
a) 16 minutes
b) 42 minutes
c) 89 seconds
d) 9.1 minutes
e) none of the above

23. To transmit a serial data transfer, a UART first
a) Sends the LSB
b) Sends the stop bit
c) Sends the start bit
d) Sends the parity bit
e) None of the above

24. Which I/O feature is not present in the PIC32mx340f512h?
a) ADC
b) SPI
c) Output capture
d) UART
e) DAC

25. A successive approximation register ADC...
a) Uses a DAC and comparator to determine the value of a signal
b) Uses successive derivatives to approximate the value of the signal
c) Uploads digital values to an ADC to determine the incoming value
d) Approximates the input analogue value through a capacitor
e) Transmits values via a digital to analogue converter

26. A 10-V maximum signal is to be digitized to a resolution of at most 0.01 V. How many bits are needed to do this?
a) 8 bits
b) 9 bits
c) 10 bits
d) 11 bits
e) 12 bits

27. The ADC conversion time is 100μs. What is the maximum frequency that can be digitized without occurrence of aliasing?
a) 1 MHz
b) 100 KHz
c) 50 KHz
d) 10 KHz
e) 5 KHz

28. For a 4-bit ADC with a positive reference equal to 5 volts and a negative reference equal to 0 volts (ground), how many volts does the least significant bit represent?
a) 0.215 V
b) 1.25 V
c) 0.16 V
d) 0.4125 V
e) 0.3125 V

29. If SPI2 clock frequency is 50 KHz and the peripheral bus frequency is 40 MHz, what is the maximum baud rate can be achieved?
a) 9600
b) 800
c) 399
d) 4800
e) 256

30. The purpose of the plib macro: SetDCOC2PWM(num ) ;
a) Enable the output compare module
b) Enable ADC module
c) Enable the digital control oscillator (DCO)
d) Write the value of duty-cycle into OSxRS
e) Write the baud rate value into SPIxRBG

31. In MIPS register conventions, v0-v1 are used for
a) Assembler temporary variable
b) Return value from functions
c) Reserved for interrupt handler
d) Global pointer
e) Stack pointer

32. Flash memories are so called because of
a) Their rapid erase and write times
b) They allow each individual location to be erased and reprogrammed
c) Programmed when it is manufactured
d) Need to be refreshed at periodic intervals
e) None of the above

33. ELF files ...
a) Identify relative base addresses for Kernel and user made data
b) Memory protection mechanism
c) Paging tables maintained for each CPU process
d) Contain address space segment descriptions
e) None of the above

34. In MIPS, KSEG1 beginning of RAM is a) 0xA0000000
b) 0xBFC00010 c) 0x9D000390 d) 0x9D000020 e) 0x9D000258

35. Immediate Addressing is used when
a) The instruction contains the address of the data
b) Two-level addressing mechanism is required
c) The address of the data can be calculated at run time
d) The operand is a constant known at the time the program is written
e) You can change the address while the program is running

36. Based Addressing is used when
a) The address consists of starting address and an offset from the starting address
b) Branching short distances in the program is required
c) Branching long distances in the program is required
d) The index or base register has the starting and the instruction has the offset
e) None of the above

37. The instruction char s[] = "Exploring the PIC32" ;
a) Reserves 19 bytes in a set of RAM locations
b) Reserves 20 bytes in a set of RAM locations

c) Reserves unlimited space in a set of RAM locations
d) Reserves 19 bytes in a set of stack locations
e) None of the above

38. In how many ways to get external devices to trigger interrupts on the PIC32?

39. Compare Linear vs. Segmented addressing

40. List 5 of the addressing modes available in your CPU.

41. Draw a device connection diagram for a typical SPI master-to-slave configuration

42. How does an asynchronous serial port achieve synchronization?

43. On a 10 bit ADC with upper and lower voltage references set to +5v and -5v, respectively, what value is stored as a 16 bit integer in the ADC buffer given a voltage of 3.986 millivolts? (note: the value is not floating or fixed point)

44. Referring to the enclosed pages from the PIC32 Output Capture datasheet, explain which bits need to be set or cleared in the OC2CON register to permit 16 bit pulse-width modulation, with a disabled fault pin, using Timer 2 as a source.

45. A serial I/O port sends the following waveform

334_What is the period of the external signal.png

a) What is the asci character being sent (use the enclosed ASCII table?
b) What type of transmitting format is being used?

46. Draw the waveform seen on the serial-data-out (SDO) line when a UART uses 7 bits of data plus odd parity to send the ASCII character ‘L'

47. What is Shannon's sampling frequency?

48. Briefly, explain the following terms: aperture time, conversion time, aliasing

49. Specify the ADC maximum conversion time, number of bits, minimum sampling frequency, and the accuracy to digitizing 2 V signal. Assume the ADC has the following specifications:

±5 V peak-to-peak, resolution of 5 mV, fmax = 3 KHz

50. Use the following circuit diagram as a reference, describe all the signals carried by the lines between the mikroBUS and the 74H595 that are necessary to display SPI serial transmitted data on 7-segement displays.

2041_What is the period of the external signal1.png

51. What should be the value placed in OC2RS and PR2 to configure the output compare 2 (OC2) in PIC32mx340F512H for a PWM signal of 10 KHz and 25% duty cycle. Assume fPB=40 MHz and timer 2 prescaler 1:1.

52. Draw a block diagram for the paging mechanism that converts the virtual address to a physical address.

53. Why it is important to declare some string arrays as constant strings.

54. Shaw how to configure the ADC to have:

Analog signal connected to AN2, Integer 16-bit right-aligned, auto convert, No scanning

AVSS and AVDD voltage reference, No interrupt, MUX A input multiplexer settings for first sample, then alternates between MUX B and MUX A input multiplexer settings for all subsequent samples, ADC clock driven by peripheral bus, Auto sampling with 31 TAD, channel 0 positive input at AN2, ADC clock (TAD) prescaler is 63 (decimal value), and MUX A positive input

Assignment 2:

1. Assuming the bus clock is 8 MHz and the programmable divider is set to 4, 8, and 16. Calculate the period of the timer overflow for each of the divider value assuming 8-bit counter then 16-bit counter.

2436_Bitcounter.png

2. Assuming a 2 MHz counter clock frequency, what is the interval between timer overflows in the circuit below

119_Bitcounter1.png

3. Describe how to use the timer/counter circuit in question (2) to generate a 10 KHz square wave. Assume a counter clock frequency of 8 MHz.

4. Assuming a 2 MHz counter clock frequency, what is the period of the external signal in the counter circuit below

2056_Bitcounter2.png

5. Explain why the timer/counter comparison circuit below can wait for a comparison up to 216 counter clock cycles away even though the counter overflows and reset to zero when it reaches the maximum count.

1412_Bitcounter3.png

Reference no: EM13890554

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