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a) Draw the multilevel primitive AND/OR/NOT implementation of the circuit which implements the following Boolean fucntionsW=A+BC+BDX=B'C+B'D+BC'D'Y=CD+C'D'Z=D'
b) use technology mapping to convert the primitive circuit to a circuit using only NAND and NOT gates. The NOT gates must be a single input, the NAND gates may be any number of inputs. Show the interim circuit diagram(s) and circle the redundant NOT gates, then show your final circuit.
c) Use technology mapping to convert the primitive circuit using only NOR and NOT gates. The NOT gates must be single input, the NOR gates may be any number of inputs. Show the interim circuit diagrams(s) and circle the redundant NOT gates, then show your final circuit.
Compare the performance of the basic latch (build with 74LS00 NAND gate), the master-slave flip-flop (7476), and the edge-triggered flip-flop (74LS76). What are the advantage and disadvantage of each design
A -find the dc collector current and the dc voltage at the collector. B Replacing the trasistor by its T-model, draw the small signal equivalent circuit of the aplifier. Analyze the resulting circuit to determine the voltage gain vo/vi.
Use rail voltages of +/-15V. Sketch the circuit diagram and the voltage transfer characteristic (Vout vs Vin) Discuss how you chose the values of the components and comment on how accurately you think you can achieve the specification.
The voltage and current for a circuit element are v(t) = 10 + 6 cos(377t + -60) - 7 cos(754t + 10) V & i(t) = 7 + 4 cos(377t + -20) + 5 cos(754t + 10), with the phase angles given in degrees.
A transmission line with no loss, with Z0= 60 ohms, is operated at 60MHz. The velocity on the line is c. The line is soldered to a ground connection at z=0. Find the input impedance into this line at z= -1.25 meters
Design a logic circuit, LOGARITHM that converts an input number X to its logarithm, log(X). Input X is given as an unsigned real number such that, 1.00
A 300-km bundled 500-kV, 60-Hz, three-phase completely transposed overhead line has three ACSR 1351-kcmil conductors per bundle, with the bundle spacing 0.5 m. The horizontal phase spacings between bundle centers are 10, 10, and 20 m.
The power dissipated in the resistor is 80 W when connected to a 10V source. Find the total dissipated power when the same resistor is connected to a 5V source.
1. Let Vi has a peak of 10v and R=1kOhm. Find the peak value of id and DC compoent V-o. 2. Consider a silicon diode with n = 1.5 Find the change in voltage if the current changes from 0.1 mA to 10 mA.
The data rate of m4(t) is 16 kbps and m5(t) is 16 kbps too. The analog signals are to be sampled at rates no less than their respective Nyquist rates, then converted to the PCM format with 4 bits for each sample. 1.Suggest a suitable multiplexing s..
A 1900x10^(-6)F capacitor, intially cahrged to 120V, is discharged by a steady state of 120x10^(-6)A how long does it take to discharge the capacitor to 0V
The transformer input is a three wire three phase 120V (line-to-line) system. the transformer output supplies a "Y" connected three phase load with a phase impedance of 600 + j300 ohms. A. sketch the diagram of the system described above.
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