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A 3-phase synchronous generator rated at 75 MVA, 13.8 kVline-to-line is connected to a power system that has a Thevenin equivalent of j0.23 per unit at 1.0 per unit voltage. The synchronous reactance of the generator is j1.35 per unit. Neglect armature resistance, armature resistance equals zero ohms. Both perunit impedances were calculated on the base MVA rating of thegenerator which is 75 MVA.
A) Determine the maximum power in MW transferred to the system when the internal voltage (Ea) of the generator is 1.10 perunit.
B) Assume the generator is being operated with constantexcitation, determine the power transferred to the system in MWwhen the power angle (δ) is adjusted to 30 degrees and theThevenin equivalent voltage drops to 0.9 per unit.
A capacitor in an RC circuit with R = 5.00 ohm and C = 6.00 mF is being charged. What is the time required for the capacitor voltage to reach 86.5 percent of its steady-state value
the arrival rat of cars at a toll plaza is 50 cars per hours. There are three boothes serving an a verage of 20 cars per hour. Assume an exponential for service time and a poisson distribution for arrival time.
A voltage source V = 119
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Consider an industrial load that absorbs 40 kW of power with power factor 0.8 lagging from a 60-Hz transmission line of voltage VL= 240
Write the logic equation for Y in terms of A,B,C that solves this problem, and draw the gate-level diagram.
At a temperature of 770 C find the resistivity of ptype Si with Na= 1015/cm3. For the doped Si at the given temperature assume μn=1000cm2/V.s and μp = 350cm2/V.s.
A uniform magnetic field is applied perpendicular to the plane of a 60-turn circular coil with a radius of 6.0 cm and a resistance of 0.60 ohms. If the magnetic field increases uniformly from 0.20 T to 1.8 T in 0.20 s
If voltage and resistance are measured as a means of indirectly measuring power, show again that if the relative uncertainties in the direct measurements are +2%, that the relative uncertainty in the indirectly measured power will be +6%.
design a 4-bit serial adder (VHDL code or schematic) which includes two shift registers and a single full-adder to perform the following functionality with proper timing controls. Two 4-bit inputs A and B will be set by eight switches on your Xili..
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