Op-amp Regulator:

The basic circuit of a simple op-amp regulator is illustrated in Figure. A routine analysis of this circuit gives :

                 V₀  =  1 + (R _f / R_i) V_ref

The circuit behaves as a voltage regulator since its output V₀ is independent of I_L and is also independent of changes in V_s.

Figure: An Op-amp Based Regulator

Design Example

If R_i = R_f  = 1 k, V_ref  = 5 V, then V₀  = 10 V DC. V₀ shall remain constant as long as V_s  ≥ V₀ + 2 (at least, to make sure that op-amp is not saturated). Moreover, V_s may be varied among 12-36 volts without causing any effect on V₀. Also, if R_L is changed, V₀ still remains constant as long as (I_L  + I_ref) is not greater than I_{0 (max)} specified for the specific op-amp (typically, 10 mA).