Different cases:

Case:

When V_th > 2/3 V_cc, then C₁ → High, which resets the FF leading to V₀₃ → Low. Though, since Q is high (≈ 4.5 volts for + 5 V supply) hence, Q₀ is saturated and pin 7 acts like a SHORT circuit.

Case:

While V_tr > 1/3 V_cc and simultaneously V_th < (2V_cc /3) , then output of the comparators C₁

and C₂ both are low, therefore, V₀₃ → same as previous state (Q_{n + 1} = Qn). it is

called the 'memory state' of the timer.

The functions and roles of the various terminals of the 555 timer are as follows :

8, 1      :           + V , - V; could also be + V and ground

3          :           Output : HIGH ≈ + V, Low ≈ - V or 0

7          :           Termed as 'discharge pin', it charges or discharges an external capacitor

4          :           A LOW on this terminal resets the timer, regardless of other inputs; to stop it happening, usually it is wired to + V

5          :           It is called 'Control voltage' terminal, a voltage/resistor associated here may change threshold and trigger levels and therefore, the operation of timer.

It may be done in the following ways. If we connect a 5 kΩ resistor among 5 and 8, then (V_th)_ref  = 10 /12.5 V and (V_tr)_ref  =  +V and therefore, the reference levels of the comparators are changed. If we connect terminal 1 to - V and terminal 5 to + V then (V_th)_ref  = + V and (V_tr)_ref   = 0 V! When not in use, 5 pin is associated to a capacitor from 5 to 1 thereby making a low pass filter to filter-out the ripples/and spikes of power supply which can otherwise result in false triggering of the timer.

2 : Trigger input (Vtr)

6 : Threshold input (Vth)