Voltage divider with ac bypasses capacitor, Electrical Engineering

Voltage divider with AC bypasses capacitor:

2419_Usage of voltage divider bias.png

Figure: Voltage divider with capacitor

The standard voltage divider circuit that is discussed above faces a drawback - AC feedback caused through resistor RE reduces the gain. This can be prevented by placing a capacitor (CE) in parallel with RE, as displayed in circuit diagram.

This capacitor is generally selected to have a low enough reactance at the signal frequencies of interest such that RE is necessarily shorted at AC, so grounding the emitter. Hence feedback is only present at DC to stabilize the operating point, in which case any AC benefits of feedback are lost.

Certainly, this idea can be employed to shunt only a portion of RE, hence retaining some AC feedback.

Posted Date: 1/10/2013 7:27:30 AM | Location : United States







Related Discussions:- Voltage divider with ac bypasses capacitor, Assignment Help, Ask Question on Voltage divider with ac bypasses capacitor, Get Answer, Expert's Help, Voltage divider with ac bypasses capacitor Discussions

Write discussion on Voltage divider with ac bypasses capacitor
Your posts are moderated
Related Questions
Summation Meters Summation meters are other special categories of meters that are used for recording the total consumption of a consumer fed at more than one point. The major

SID  Input Serial input data  single  bit can be  accepted through this  pin using RIM  command  discussed in details in chapter8.

Fundamental of Metal Casting: Fundamental of Metal Casting : Casting process is based on the property of a liquid to take up the shape of vessel containing it. Molten metal

Transmission: The policy emphasizes in which adequate and timely investment along within efficient and coordinated operation is essential for developing a robust and integrate

Q. A transistor has a base current i B = 25 µA, α = 0.985, and negligible ICBO. Find β, iE, and i .

emitter followers regulator

what is an useful life time in bathtub curve?

what is compensation of bjt

Q. For the CS JFET ampli?er circuit of Figure, R D = 2k and R L = 3k. The JFET with ro = 15 k has a voltage gain A v1 =-4.5 when the entire source resistance is bypassed. Fin

why open loop system is stable and why degree of stability varies in closed loop system