The specialised demands and requirements of science, industry and military have led to the creation of powerful super computers. For numerically intensive computing (geological exploration, wind tunnel simulations, molecular physics, and space and defence systems), computers capable of performing multiple giga flops (billion floating point operations per second) are being produced. These computers, of which Cray is a well known example, use vector and parallel processing to achieve the necessary number-crunching power. Vector and parallel processing require unusual computer architecture and special programming. For vector processing, the computer architecture works with vector arrays rather than discrete scalar elements, and the numerically intensive portions of a program must be written to use this facility. To achieve full speed and power in vector arrays processing, the super computer must not be interrupted in the middle of its program. which limits the interactive use of super computers. Scientists and engineers have found that they can experiment with more design and research solutions in a short period of time on interactive engineering and graphics workstations.
Super computers built with a parallel processing architecture are designed to overcome the processing bottleneck caused by using a Von Neumann-type of single instruction stream. The parallel computer architecture must coordinate communication and timing across an array to allow simultaneous computation of subroutines. Although, massively parallel super computers, such as those made by Sequent and Floating Point Systems, are in principle faster and less expensive than the serial super computers, the unconventional programming required to utilise the parallel architectures has been an obstacle to wide wise of these machines.
It may be stated here that while research continues in the United States and Japan to create faster super computers, some of the techniques employed in super computer architecture are being transferred to microprocessor design. For example, Intel has produced a RISC (Reduced Instruction Set Computing) microprocessor, the 80860, modeled on the Cray super computer. The design uses one million transistors to provide a 64 bit processor, data and instruction caches, integer and floating point math units and a graphics processor. The math units can operate in parallel using a pipe lining system and the data cache. Integrating these functions on a single chip makes it possible to sustain high processor speed over time. The Intel 80860 and similar RISC chips are produced by Motorola and other companies.