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Successive-approximation analog to digital converter
This converter, shown in Figure, also contains a D/A converter, but the binary counter is replaced by a successive-approximation register (SAR), which makes the analog-to-digital conversion much faster. The SAR sets the MSB to 1 and all other bits to 0, after a start-of- conversion pulse. If the comparator indicates the D/A converter output to be larger than the signal
to be converted, then the MSB is reset to 0 and the next bit is tried as the MSB. On the other hand, if the signal to be converted is larger than the D/A computer output, then the MSB remains 1. This procedure is repeated for each bit until the binary equivalent of the input analog signal is obtained at the end. This method requires only n clock periods, compared to the 2n clock periods needed by the counter-controlled A/D converter, where n is the number of bits required to encode the analog signal. The National ADC 0844 is a popular 8-bit A/D converter based on the SAR.
Q. Given ¯B = (y ¯ax - x ¯ay )/(x 2 + y 2 ) T, determine the magnetic force on the current element Id ¯l = 5 × 0.001¯a A located at (3,4,2).
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