Shr-sar-logical instruction-microprocessor, Assembly Language

SHR : Shift Logical Right: This instruction performs bit-wise right shifts on the operand word or byte that might be reside in  a memory location or a register, by the specified count in the instruction and inserts zeros in the shifted positions. The result is in the destination operand. Given figure describe execution of this instruction. This instruction shifts operand through the carry flag.

918_SHR.jpg

                                             Figure: Execution SHR Instruction

SAR : Shift Arithmetic Right: This instruction performs right shifts on the operand byte or word that might be memory location or register by the particular count in the instruction and inserts the most significant bit of the operand in the new inserted positions. The result is in the destination operand. Given figure described execution of the instruction. All of the condition code flags are affected from this. This shift operation shifts the operand through the carry flag.

508_SAR.jpg


                                                      Figure : Execution of SAR Instruction

Posted Date: 10/12/2012 2:52:49 AM | Location : United States







Related Discussions:- Shr-sar-logical instruction-microprocessor, Assignment Help, Ask Question on Shr-sar-logical instruction-microprocessor, Get Answer, Expert's Help, Shr-sar-logical instruction-microprocessor Discussions

Write discussion on Shr-sar-logical instruction-microprocessor
Your posts are moderated
Related Questions

I am running a small minecraft server off of my old mac mini, and am having a big issue. My computer isn''t very good, and even just running this server is an issue. I use a comma

Please let me know if you can do an assignment in the next 12 hours

use">http://www.raritanval.edu/uploadedFiles/faculty/cs/full-time/Brower/CISY256/2013Spring/CISY256%20Assembly%20Project.pdf use microsoft visual 2010 and http://www.asmirvine.c

Tabular comparison for µ PS' Parameters Tables (a) and (b) list the characteristic of Intel microprocessor. Table(a):   Table(b): It has a 64 bit da

Modes of 8254 :   Mode 0 (Interrupt on Terminal Count)-GATE which value is 1 enables counting and GATE  which value is 0 disables counting, and GATE put not effect on

 Pin Description of 8086 The microprocessor 8086 is a 16-bit CPU available in 3 clock rates, for example 5, 8 and 10 MHz, packaged in a40 pin CERDIP or plastic package. The 8

Assume that the registers are initialized to EAX=12345h,EBX =9528h ECX=1275h,EDX=3001h sub AH,AH sub DH,DH mov DL,AL mov CL,3 shl DX,CL shl AX,1 add DX,AX

NASM assembly language program: Consider a sequence of 19 strictly positive decimal digits, most likely stored in an array. There are obviously duplicates, and the sequence is un