Risc approach - computer architecture, Computer Engineering

RISC Approach - computer architecture:

The RISC processors only use easy instructions that can be executed within one clock cycle. therefore, the "MULT" command discussed above could be divided into three separate commands: 1)"LOAD," which  is used to moves data from the memory bank to a register, 2) "PROD," which is used to finds the product of two operands located within the registers, and  3) "STORE," which is used  moves data from a register to the memory banks. In order to perform the precise series of steps described in the CISC approach, a programmer would require coding 4 lines of assembly:

LOAD A, 2:3

LOAD B, 5:2

PROD A, B

STORE 2:3, A

Firstly, it may seem like a much less competent way of completing the operation. Because there are more lines of code so more RAM is required to store the assembly level instructions. The compiler ought to be performing more work to convert a high-level language statement into the code of this form.

 

 

Posted Date: 10/13/2012 3:48:15 AM | Location : United States







Related Discussions:- Risc approach - computer architecture, Assignment Help, Ask Question on Risc approach - computer architecture, Get Answer, Expert's Help, Risc approach - computer architecture Discussions

Write discussion on Risc approach - computer architecture
Your posts are moderated
Related Questions
The NAND gate. The NAND gate is equivalent to an AND gate followed by a NOT gate so that the output is 0 when all of the inputs are high, otherwise the output is 1. There may

Difference between static and dynamic RAM. Draw the circuits of one cell of each and explain its working. Ans: Differentiation among Static RAM and Dynamic RAM: Static

haw to convert context free grammar to regular grammar

Q. Explain Execution-modes of a multiprocessor? Execution-modes of a multiprocessor: Several modes of multiprocessing comprise parallel execution of programs at (i) Fine Grain

Dynamic address translation :  If, when executing an instruction, a CPU fetches an instruction located at a specific virtual address, or fetches data from a particular virtual

KK manufacturing company is faced with demand for its product in each of the next four periods as shown in Table 1.  It must decide upon a production schedule to meet these demands

In a raw Itanium, a 'Processor Abstraction Layer' (PAL) is incorporated in system. When it's booted PAL is loaded in the CPU and provides a low-level interface which abstracts a nu

Q. Show the Features of parallel virtual machine? Easy to install; Easy to configure; Multiple users each can use PVM concurrently; Multiple applications fro

Constraint Satisfaction Problems: Furthermore I was perhaps most proud of AI on a Sunday. However this particular Sunday, a friend of mine found an article in the Observer reg

What is the difference between = = = and = = ? output of "==" can be 1, 0 or X. output of "===" can only be 0 or 1. When you are comparing 2 nos using "==" and if one/bo