Register-to-register architecture, Computer Engineering

Register-to-Register Architecture: In this organization, results and operands are accessed not directly from the main memory by the scalar or vector registers. The vectors which are required presently can be stored in the CPU registers. Cray- 1 computer accept this architecture for the vector instructions and its CPY having 8 vector registers, every register capable of storing a 64 element vector where single element is of 8 bytes.

 

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