Read architecture:look aside cache-microprocessor, Assembly Language

Read Architecture : Look Aside Cache

In "look aside" cache architecture the main memory is located conflictingthe system interface. Both the cache main memory sees a bus cycle at the same time. Hence it name is "looks aside."

Look Aside Cache Example:

When the processor begin a read cycle, the cache checks to see if that address is a cache hit.

  • HIT: If the cache has the memory location, then the cache will respond to the read cycle and then terminate the bus cycle.
  • MISS: If the cache does not contain the memory location, then themain memory will give respond to the processor and then stop the bus cycle. The cache will snarf the data, so in next time the processor requests this data it will be a cache hit. Look aside caches are less complicated, which makes them less costly. This architecture also provides better response to a cache miss since the DRAM and the cache both see the bus cycle at the same time. The drawback is the processor can't access cache while another bus master is accessing main memory.
Posted Date: 10/10/2012 6:00:14 AM | Location : United States







Related Discussions:- Read architecture:look aside cache-microprocessor, Assignment Help, Ask Question on Read architecture:look aside cache-microprocessor, Get Answer, Expert's Help, Read architecture:look aside cache-microprocessor Discussions

Write discussion on Read architecture:look aside cache-microprocessor
Your posts are moderated
Related Questions
I/O interface I/O  devices such as displays and keyboards  establish  communication of computer with outside world. Devices may be interfaced in 2 ways Memory mapped I/O and I/

write a program using assembly language that print your name

ROR : Rotate Right without Carry: This instruction rotates the contents of destination operand to the bit-wise right either by one or by the count specified in register CL, exclud

Write a program to solve problem 9, Summation Program, on page 179 of chapter 5 in the textbook (book:kip Irvine Assembly Language sixth edition)

Memory Segmentation : The  memory in an 8086/8088  based system is organized as segmented memory. In this scheme, the whole physically available memory can be divided into a n

Interrupt System Based on Multiple 8259As A multiple 8259A interrupt system is diagrammed in given figure in this figure data bus drivers are not indicated, but they could be i

You have to write a subroutine (assembly language code using NASM) for the following equation.

Assume that the registers are initialized to EAX=12345h,EBX =9528h ECX=1275h,EDX=3001h sub AH,AH sub DH,DH mov DL,AL mov CL,3 shl DX,CL shl AX,1 add DX,AX

write an assembly language program to find average of odd numbers from an array of 8 bit numbers

AAM: ASCII Adjust for Multiplication after execution. This instruction converts the product available in the AL into unpacked BCD format.  This follows a multiplication   instruct