Implementation of BUS, Computer Engineering

Q. Implementation of BUS

Construction of a bus system for four registers employing 4×1 multiplexers is displayed below. Every register has four bits which are numbered 0 through 3. Every multiplexer has 4 data inputs, numbered 0 through 3 and two control or selection lines which are  C0 and C1. The data inputs of 0th MUX are associated to the respective 0th input of each register to form four lines of the bus. The 0th multiplexer multiplexes the four 0th bits of the registers and in the same way for the three other multiplexers. 

Because the same selection lines C0 and C1 are connected to all multiplexers so they choose the four bits of one register and transfer them in four-line common bus.

 

1517_Implementation of BUS.png

Figure: Implementation of BUS

When C1C0 = 00 the 0th data input of all multiplexers are selected and this causes bus lines to receive content of register A because the outputs of register A are associated to the 0th data inputs of the multiplexers which is then applied to output which forms the bus. In the same way when C1C0 = 01, register B is selected and so on. The subsequent table displays the register which is selected for every of the four possible values of selection lines: 

267_Implementation of BUS1.png

Figure: Bus Line Selection

To create a bus for 8 registers of 16 bits each you would need 16 multiplexers one for every line in the bus. Number of multiplexers required to construct the bus is equal to number of bits in every register. Every multiplexer should have eight data input lines as well as three selection lines (23 = 8) to multiplex one bit in eight registers.

Posted Date: 7/27/2013 3:26:00 AM | Location : United States







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