Design issues, Computer Engineering

Design issues: To complete the maximum processor utilization in a multithreaded architecture, the following design issues have to be addressed:

  • Context Switching time: S < I, it means very quick context switching mechanism is required.
  • Number of Threads: A huge number of threads should be available such that processor switches to an active thread from the idle state.



Posted Date: 3/4/2013 5:53:32 AM | Location : United States

Related Discussions:- Design issues, Assignment Help, Ask Question on Design issues, Get Answer, Expert's Help, Design issues Discussions

Write discussion on Design issues
Your posts are moderated
Related Questions
Q. In PRAM model steps required for executing an algorithm? Subsequent steps are performed by a PRAM model whenever executing an algorithm: i) Read phase: First the N proc

What are the features of Client/Server Computing? Although there are several different configurations, different hardware and software platforms and even dissimilar network pro

Explain the access methods used in LANs. Access methods utilized in LAN: i. Switched access: this is used in LANs which are assigned around CBXs. Electronic switching

Explain the different sub-functions of Process Scheduling. Process scheduling contains the subsequent sub-functions: 1. Scheduling: Chooses the process to be executed next

Implement the following function using 8 to 1 multiplexer Y(A, B, C, D) = ∑(0,1,2,5,9,11,13,15) Ans. We will obtain three variables B,C and D at selection lines and also A as i

Explain the E-cheques verses Credit Cards in brief. E-cheques: E-cheques are utilized for business dealing into e-commerce. Transactions of such cheques take place onto Inter

TYPEWRITERS : Typewriter is the most common machine used in almost all offices. Typewritten letters are attractive in appearance as compared to handwritten ones. The same matter c

what is the work of pin daigram in 8086 microprocessor in assembly

With the help of a neat diagram, explain the working of a weighted-resistor D/A converter. Ans Weighted Register D/A Converter:   Digital input that has 4 bits