Buses - computer architecture, Computer Engineering

Buses:

  • Execution of 1 instruction need the following 3 steps to be performed by the CPU:

I.  Fetch the contents of the memory location pointed at by the computer system. The contents of this location are interpreted as an instruction to be executed. Therefore, they are holed up in the instruction register (IR). Symbolically, it can be written as:

1438_Buses.png

2. supposing that the memory is byte addressable .it increment the contents of the PC by 4, that is 1155_Buses1.png

3.   Perform the actions mention by the instruction stored in the IR

  • But, in cases wherever an instruction take place more than 1 word, steps 1 and 2 might be repeated as several times as essential to fetch the complete instruction.
  • 2 first steps are typically referred to as the fetch phase.
  • Step 3 constitutes  in the execution phase

 

29_Buses2.png

Most of the operation in step 1 to 3 denoted earlier can be carried out by performing one or more of the following function

However, in cases where an instruction takes place more than 1 word, steps 1 and 2 might be

repeated as several times as essential to fetch the complete instruction.

  • 2 first steps are usually referred to as the fetch phase.
  • Step 3 constitutes in the execution phase

Fetch the contents of a specific memory location and load them into a CPU Register

  • Hold up a word of data from a CPU register into a particular given memory location.
  • Transfer a word of data from 1 CPU register to another or to ALU.
  • Perform logic or arithmetic operation, and store the outcome in a CPU register.

 

Posted Date: 10/13/2012 6:39:11 AM | Location : United States







Related Discussions:- Buses - computer architecture, Assignment Help, Ask Question on Buses - computer architecture, Get Answer, Expert's Help, Buses - computer architecture Discussions

Write discussion on Buses - computer architecture
Your posts are moderated
Related Questions
RAM: Read / Write memory, High Speed, Volatile Memory. ROM: Read only memory, Low Speed, Non Voliate Memory.   RAM- Random Access memory it is a Volatile Memory.  volatil

Why floating point number more difficult to represent and process than integer? In floating point numbers we have to show any number in three fields sign, exponent and mantissa

Explain about the MINI COMPUTER Minicomputers are much smaller in size than mainframe computers and they are also less expensive.  The cost of these computers can differ from a

Knowledge Representation: To recap, we now have some characterizations of "AI", that when an "AI" problem arises, you will be able to put all into context exactly, find the co

Why does FTP use two standard ports whereas other protocols, in general use only one port? Justify. File transfer protocol uses a control connection just to send commands and r

Q. What is Bus arbitration? In this technique, I/O interface first needs to control bus and only after that it can request for an interrupt. In this technique because only one

Design, write, and implement distributed networked application using Java Design the communication protocol (message format and exchange procedure) that your application will re

"Super ASCII", if it contains the character frequency equal to their ascii values. String will contain only lower case alphabets (''a''-''z'') and the ascii values will starts from

How many flip flops are required to construct a decade counter ? Ans. 4 FlipFlop's are required because decade counter counts 10 states from 0 to 9 (that is from 0000 to 1001).

Explain the relationship amongst Translated address and Linked address. Translated address: Address assigned through the translator Linked address: Address assigned